1 /*
2 * cx18 init/start/stop/exit stream functions
3 *
4 * Derived from ivtv-streams.c
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
7 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25 #include "cx18-driver.h"
26 #include "cx18-io.h"
27 #include "cx18-fileops.h"
28 #include "cx18-mailbox.h"
29 #include "cx18-i2c.h"
30 #include "cx18-queue.h"
31 #include "cx18-ioctl.h"
32 #include "cx18-streams.h"
33 #include "cx18-cards.h"
34 #include "cx18-scb.h"
35 #include "cx18-dvb.h"
36
37 #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
38
39 static struct v4l2_file_operations cx18_v4l2_enc_fops = {
40 .owner = THIS_MODULE,
41 .read = cx18_v4l2_read,
42 .open = cx18_v4l2_open,
43 .unlocked_ioctl = video_ioctl2,
44 .release = cx18_v4l2_close,
45 .poll = cx18_v4l2_enc_poll,
46 .mmap = cx18_v4l2_mmap,
47 };
48
49 /* offset from 0 to register ts v4l2 minors on */
50 #define CX18_V4L2_ENC_TS_OFFSET 16
51 /* offset from 0 to register pcm v4l2 minors on */
52 #define CX18_V4L2_ENC_PCM_OFFSET 24
53 /* offset from 0 to register yuv v4l2 minors on */
54 #define CX18_V4L2_ENC_YUV_OFFSET 32
55
56 static struct {
57 const char *name;
58 int vfl_type;
59 int num_offset;
60 int dma;
61 } cx18_stream_info[] = {
62 { /* CX18_ENC_STREAM_TYPE_MPG */
63 "encoder MPEG",
64 VFL_TYPE_GRABBER, 0,
65 PCI_DMA_FROMDEVICE,
66 },
67 { /* CX18_ENC_STREAM_TYPE_TS */
68 "TS",
69 VFL_TYPE_GRABBER, -1,
70 PCI_DMA_FROMDEVICE,
71 },
72 { /* CX18_ENC_STREAM_TYPE_YUV */
73 "encoder YUV",
74 VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
75 PCI_DMA_FROMDEVICE,
76 },
77 { /* CX18_ENC_STREAM_TYPE_VBI */
78 "encoder VBI",
79 VFL_TYPE_VBI, 0,
80 PCI_DMA_FROMDEVICE,
81 },
82 { /* CX18_ENC_STREAM_TYPE_PCM */
83 "encoder PCM audio",
84 VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
85 PCI_DMA_FROMDEVICE,
86 },
87 { /* CX18_ENC_STREAM_TYPE_IDX */
88 "encoder IDX",
89 VFL_TYPE_GRABBER, -1,
90 PCI_DMA_FROMDEVICE,
91 },
92 { /* CX18_ENC_STREAM_TYPE_RAD */
93 "encoder radio",
94 VFL_TYPE_RADIO, 0,
95 PCI_DMA_NONE,
96 },
97 };
98
99
cx18_dma_free(struct videobuf_queue * q,struct cx18_stream * s,struct cx18_videobuf_buffer * buf)100 static void cx18_dma_free(struct videobuf_queue *q,
101 struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
102 {
103 videobuf_waiton(q, &buf->vb, 0, 0);
104 videobuf_vmalloc_free(&buf->vb);
105 buf->vb.state = VIDEOBUF_NEEDS_INIT;
106 }
107
cx18_prepare_buffer(struct videobuf_queue * q,struct cx18_stream * s,struct cx18_videobuf_buffer * buf,u32 pixelformat,unsigned int width,unsigned int height,enum v4l2_field field)108 static int cx18_prepare_buffer(struct videobuf_queue *q,
109 struct cx18_stream *s,
110 struct cx18_videobuf_buffer *buf,
111 u32 pixelformat,
112 unsigned int width, unsigned int height,
113 enum v4l2_field field)
114 {
115 struct cx18 *cx = s->cx;
116 int rc = 0;
117
118 /* check settings */
119 buf->bytes_used = 0;
120
121 if ((width < 48) || (height < 32))
122 return -EINVAL;
123
124 buf->vb.size = (width * height * 2);
125 if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
126 return -EINVAL;
127
128 /* alloc + fill struct (if changed) */
129 if (buf->vb.width != width || buf->vb.height != height ||
130 buf->vb.field != field || s->pixelformat != pixelformat ||
131 buf->tvnorm != cx->std) {
132
133 buf->vb.width = width;
134 buf->vb.height = height;
135 buf->vb.field = field;
136 buf->tvnorm = cx->std;
137 s->pixelformat = pixelformat;
138
139 /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
140 UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
141 if (s->pixelformat == V4L2_PIX_FMT_HM12)
142 s->vb_bytes_per_frame = height * 720 * 3 / 2;
143 else
144 s->vb_bytes_per_frame = height * 720 * 2;
145 cx18_dma_free(q, s, buf);
146 }
147
148 if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
149 return -EINVAL;
150
151 if (buf->vb.field == 0)
152 buf->vb.field = V4L2_FIELD_INTERLACED;
153
154 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
155 buf->vb.width = width;
156 buf->vb.height = height;
157 buf->vb.field = field;
158 buf->tvnorm = cx->std;
159 s->pixelformat = pixelformat;
160
161 /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
162 UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
163 if (s->pixelformat == V4L2_PIX_FMT_HM12)
164 s->vb_bytes_per_frame = height * 720 * 3 / 2;
165 else
166 s->vb_bytes_per_frame = height * 720 * 2;
167 rc = videobuf_iolock(q, &buf->vb, NULL);
168 if (rc != 0)
169 goto fail;
170 }
171 buf->vb.state = VIDEOBUF_PREPARED;
172 return 0;
173
174 fail:
175 cx18_dma_free(q, s, buf);
176 return rc;
177
178 }
179
180 /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
181 1440 is a single line of 4:2:2 YUV at 720 luma samples wide
182 */
183 #define VB_MIN_BUFFERS 32
184 #define VB_MIN_BUFSIZE 4147200
185
buffer_setup(struct videobuf_queue * q,unsigned int * count,unsigned int * size)186 static int buffer_setup(struct videobuf_queue *q,
187 unsigned int *count, unsigned int *size)
188 {
189 struct cx18_stream *s = q->priv_data;
190 struct cx18 *cx = s->cx;
191
192 *size = 2 * cx->cxhdl.width * cx->cxhdl.height;
193 if (*count == 0)
194 *count = VB_MIN_BUFFERS;
195
196 while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
197 (*count)--;
198
199 q->field = V4L2_FIELD_INTERLACED;
200 q->last = V4L2_FIELD_INTERLACED;
201
202 return 0;
203 }
204
buffer_prepare(struct videobuf_queue * q,struct videobuf_buffer * vb,enum v4l2_field field)205 static int buffer_prepare(struct videobuf_queue *q,
206 struct videobuf_buffer *vb,
207 enum v4l2_field field)
208 {
209 struct cx18_videobuf_buffer *buf =
210 container_of(vb, struct cx18_videobuf_buffer, vb);
211 struct cx18_stream *s = q->priv_data;
212 struct cx18 *cx = s->cx;
213
214 return cx18_prepare_buffer(q, s, buf, s->pixelformat,
215 cx->cxhdl.width, cx->cxhdl.height, field);
216 }
217
buffer_release(struct videobuf_queue * q,struct videobuf_buffer * vb)218 static void buffer_release(struct videobuf_queue *q,
219 struct videobuf_buffer *vb)
220 {
221 struct cx18_videobuf_buffer *buf =
222 container_of(vb, struct cx18_videobuf_buffer, vb);
223 struct cx18_stream *s = q->priv_data;
224
225 cx18_dma_free(q, s, buf);
226 }
227
buffer_queue(struct videobuf_queue * q,struct videobuf_buffer * vb)228 static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
229 {
230 struct cx18_videobuf_buffer *buf =
231 container_of(vb, struct cx18_videobuf_buffer, vb);
232 struct cx18_stream *s = q->priv_data;
233
234 buf->vb.state = VIDEOBUF_QUEUED;
235
236 list_add_tail(&buf->vb.queue, &s->vb_capture);
237 }
238
239 static struct videobuf_queue_ops cx18_videobuf_qops = {
240 .buf_setup = buffer_setup,
241 .buf_prepare = buffer_prepare,
242 .buf_queue = buffer_queue,
243 .buf_release = buffer_release,
244 };
245
cx18_stream_init(struct cx18 * cx,int type)246 static void cx18_stream_init(struct cx18 *cx, int type)
247 {
248 struct cx18_stream *s = &cx->streams[type];
249 struct video_device *video_dev = s->video_dev;
250
251 /* we need to keep video_dev, so restore it afterwards */
252 memset(s, 0, sizeof(*s));
253 s->video_dev = video_dev;
254
255 /* initialize cx18_stream fields */
256 s->dvb = NULL;
257 s->cx = cx;
258 s->type = type;
259 s->name = cx18_stream_info[type].name;
260 s->handle = CX18_INVALID_TASK_HANDLE;
261
262 s->dma = cx18_stream_info[type].dma;
263 s->buffers = cx->stream_buffers[type];
264 s->buf_size = cx->stream_buf_size[type];
265 INIT_LIST_HEAD(&s->buf_pool);
266 s->bufs_per_mdl = 1;
267 s->mdl_size = s->buf_size * s->bufs_per_mdl;
268
269 init_waitqueue_head(&s->waitq);
270 s->id = -1;
271 spin_lock_init(&s->q_free.lock);
272 cx18_queue_init(&s->q_free);
273 spin_lock_init(&s->q_busy.lock);
274 cx18_queue_init(&s->q_busy);
275 spin_lock_init(&s->q_full.lock);
276 cx18_queue_init(&s->q_full);
277 spin_lock_init(&s->q_idle.lock);
278 cx18_queue_init(&s->q_idle);
279
280 INIT_WORK(&s->out_work_order, cx18_out_work_handler);
281
282 INIT_LIST_HEAD(&s->vb_capture);
283 s->vb_timeout.function = cx18_vb_timeout;
284 s->vb_timeout.data = (unsigned long)s;
285 init_timer(&s->vb_timeout);
286 spin_lock_init(&s->vb_lock);
287 if (type == CX18_ENC_STREAM_TYPE_YUV) {
288 spin_lock_init(&s->vbuf_q_lock);
289
290 s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
291 videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
292 &cx->pci_dev->dev, &s->vbuf_q_lock,
293 V4L2_BUF_TYPE_VIDEO_CAPTURE,
294 V4L2_FIELD_INTERLACED,
295 sizeof(struct cx18_videobuf_buffer),
296 s, &cx->serialize_lock);
297
298 /* Assume the previous pixel default */
299 s->pixelformat = V4L2_PIX_FMT_HM12;
300 s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
301 }
302 }
303
cx18_prep_dev(struct cx18 * cx,int type)304 static int cx18_prep_dev(struct cx18 *cx, int type)
305 {
306 struct cx18_stream *s = &cx->streams[type];
307 u32 cap = cx->v4l2_cap;
308 int num_offset = cx18_stream_info[type].num_offset;
309 int num = cx->instance + cx18_first_minor + num_offset;
310
311 /*
312 * These five fields are always initialized.
313 * For analog capture related streams, if video_dev == NULL then the
314 * stream is not in use.
315 * For the TS stream, if dvb == NULL then the stream is not in use.
316 * In those cases no other fields but these four can be used.
317 */
318 s->video_dev = NULL;
319 s->dvb = NULL;
320 s->cx = cx;
321 s->type = type;
322 s->name = cx18_stream_info[type].name;
323
324 /* Check whether the radio is supported */
325 if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
326 return 0;
327
328 /* Check whether VBI is supported */
329 if (type == CX18_ENC_STREAM_TYPE_VBI &&
330 !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
331 return 0;
332
333 /* User explicitly selected 0 buffers for these streams, so don't
334 create them. */
335 if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
336 cx->stream_buffers[type] == 0) {
337 CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
338 return 0;
339 }
340
341 cx18_stream_init(cx, type);
342
343 /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
344 if (type == CX18_ENC_STREAM_TYPE_TS) {
345 if (cx->card->hw_all & CX18_HW_DVB) {
346 s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
347 if (s->dvb == NULL) {
348 CX18_ERR("Couldn't allocate cx18_dvb structure"
349 " for %s\n", s->name);
350 return -ENOMEM;
351 }
352 } else {
353 /* Don't need buffers for the TS, if there is no DVB */
354 s->buffers = 0;
355 }
356 }
357
358 if (num_offset == -1)
359 return 0;
360
361 /* allocate and initialize the v4l2 video device structure */
362 s->video_dev = video_device_alloc();
363 if (s->video_dev == NULL) {
364 CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
365 s->name);
366 return -ENOMEM;
367 }
368
369 snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
370 cx->v4l2_dev.name, s->name);
371
372 s->video_dev->num = num;
373 s->video_dev->v4l2_dev = &cx->v4l2_dev;
374 s->video_dev->fops = &cx18_v4l2_enc_fops;
375 s->video_dev->release = video_device_release;
376 s->video_dev->tvnorms = V4L2_STD_ALL;
377 s->video_dev->lock = &cx->serialize_lock;
378 cx18_set_funcs(s->video_dev);
379 return 0;
380 }
381
382 /* Initialize v4l2 variables and register v4l2 devices */
cx18_streams_setup(struct cx18 * cx)383 int cx18_streams_setup(struct cx18 *cx)
384 {
385 int type, ret;
386
387 /* Setup V4L2 Devices */
388 for (type = 0; type < CX18_MAX_STREAMS; type++) {
389 /* Prepare device */
390 ret = cx18_prep_dev(cx, type);
391 if (ret < 0)
392 break;
393
394 /* Allocate Stream */
395 ret = cx18_stream_alloc(&cx->streams[type]);
396 if (ret < 0)
397 break;
398 }
399 if (type == CX18_MAX_STREAMS)
400 return 0;
401
402 /* One or more streams could not be initialized. Clean 'em all up. */
403 cx18_streams_cleanup(cx, 0);
404 return ret;
405 }
406
cx18_reg_dev(struct cx18 * cx,int type)407 static int cx18_reg_dev(struct cx18 *cx, int type)
408 {
409 struct cx18_stream *s = &cx->streams[type];
410 int vfl_type = cx18_stream_info[type].vfl_type;
411 const char *name;
412 int num, ret;
413
414 if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
415 ret = cx18_dvb_register(s);
416 if (ret < 0) {
417 CX18_ERR("DVB failed to register\n");
418 return ret;
419 }
420 }
421
422 if (s->video_dev == NULL)
423 return 0;
424
425 num = s->video_dev->num;
426 /* card number + user defined offset + device offset */
427 if (type != CX18_ENC_STREAM_TYPE_MPG) {
428 struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
429
430 if (s_mpg->video_dev)
431 num = s_mpg->video_dev->num
432 + cx18_stream_info[type].num_offset;
433 }
434 video_set_drvdata(s->video_dev, s);
435
436 /* Register device. First try the desired minor, then any free one. */
437 ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
438 if (ret < 0) {
439 CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
440 s->name, num);
441 video_device_release(s->video_dev);
442 s->video_dev = NULL;
443 return ret;
444 }
445
446 name = video_device_node_name(s->video_dev);
447
448 switch (vfl_type) {
449 case VFL_TYPE_GRABBER:
450 CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
451 name, s->name, cx->stream_buffers[type],
452 cx->stream_buf_size[type] / 1024,
453 (cx->stream_buf_size[type] * 100 / 1024) % 100);
454 break;
455
456 case VFL_TYPE_RADIO:
457 CX18_INFO("Registered device %s for %s\n", name, s->name);
458 break;
459
460 case VFL_TYPE_VBI:
461 if (cx->stream_buffers[type])
462 CX18_INFO("Registered device %s for %s "
463 "(%d x %d bytes)\n",
464 name, s->name, cx->stream_buffers[type],
465 cx->stream_buf_size[type]);
466 else
467 CX18_INFO("Registered device %s for %s\n",
468 name, s->name);
469 break;
470 }
471
472 return 0;
473 }
474
475 /* Register v4l2 devices */
cx18_streams_register(struct cx18 * cx)476 int cx18_streams_register(struct cx18 *cx)
477 {
478 int type;
479 int err;
480 int ret = 0;
481
482 /* Register V4L2 devices */
483 for (type = 0; type < CX18_MAX_STREAMS; type++) {
484 err = cx18_reg_dev(cx, type);
485 if (err && ret == 0)
486 ret = err;
487 }
488
489 if (ret == 0)
490 return 0;
491
492 /* One or more streams could not be initialized. Clean 'em all up. */
493 cx18_streams_cleanup(cx, 1);
494 return ret;
495 }
496
497 /* Unregister v4l2 devices */
cx18_streams_cleanup(struct cx18 * cx,int unregister)498 void cx18_streams_cleanup(struct cx18 *cx, int unregister)
499 {
500 struct video_device *vdev;
501 int type;
502
503 /* Teardown all streams */
504 for (type = 0; type < CX18_MAX_STREAMS; type++) {
505
506 /* The TS has a cx18_dvb structure, not a video_device */
507 if (type == CX18_ENC_STREAM_TYPE_TS) {
508 if (cx->streams[type].dvb != NULL) {
509 if (unregister)
510 cx18_dvb_unregister(&cx->streams[type]);
511 kfree(cx->streams[type].dvb);
512 cx->streams[type].dvb = NULL;
513 cx18_stream_free(&cx->streams[type]);
514 }
515 continue;
516 }
517
518 /* No struct video_device, but can have buffers allocated */
519 if (type == CX18_ENC_STREAM_TYPE_IDX) {
520 /* If the module params didn't inhibit IDX ... */
521 if (cx->stream_buffers[type] != 0) {
522 cx->stream_buffers[type] = 0;
523 /*
524 * Before calling cx18_stream_free(),
525 * check if the IDX stream was actually set up.
526 * Needed, since the cx18_probe() error path
527 * exits through here as well as normal clean up
528 */
529 if (cx->streams[type].buffers != 0)
530 cx18_stream_free(&cx->streams[type]);
531 }
532 continue;
533 }
534
535 /* If struct video_device exists, can have buffers allocated */
536 vdev = cx->streams[type].video_dev;
537
538 cx->streams[type].video_dev = NULL;
539 if (vdev == NULL)
540 continue;
541
542 if (type == CX18_ENC_STREAM_TYPE_YUV)
543 videobuf_mmap_free(&cx->streams[type].vbuf_q);
544
545 cx18_stream_free(&cx->streams[type]);
546
547 /* Unregister or release device */
548 if (unregister)
549 video_unregister_device(vdev);
550 else
551 video_device_release(vdev);
552 }
553 }
554
cx18_vbi_setup(struct cx18_stream * s)555 static void cx18_vbi_setup(struct cx18_stream *s)
556 {
557 struct cx18 *cx = s->cx;
558 int raw = cx18_raw_vbi(cx);
559 u32 data[CX2341X_MBOX_MAX_DATA];
560 int lines;
561
562 if (cx->is_60hz) {
563 cx->vbi.count = 12;
564 cx->vbi.start[0] = 10;
565 cx->vbi.start[1] = 273;
566 } else { /* PAL/SECAM */
567 cx->vbi.count = 18;
568 cx->vbi.start[0] = 6;
569 cx->vbi.start[1] = 318;
570 }
571
572 /* setup VBI registers */
573 if (raw)
574 v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
575 else
576 v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
577
578 /*
579 * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
580 * VBI when the first analog capture channel starts, as once it starts
581 * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
582 * (i.e. for the VBI capture channels). We also send it for each
583 * analog capture channel anyway just to make sure we get the proper
584 * behavior
585 */
586 if (raw) {
587 lines = cx->vbi.count * 2;
588 } else {
589 /*
590 * For 525/60 systems, according to the VIP 2 & BT.656 std:
591 * The EAV RP code's Field bit toggles on line 4, a few lines
592 * after the Vertcal Blank bit has already toggled.
593 * Tell the encoder to capture 21-4+1=18 lines per field,
594 * since we want lines 10 through 21.
595 *
596 * For 625/50 systems, according to the VIP 2 & BT.656 std:
597 * The EAV RP code's Field bit toggles on line 1, a few lines
598 * after the Vertcal Blank bit has already toggled.
599 * (We've actually set the digitizer so that the Field bit
600 * toggles on line 2.) Tell the encoder to capture 23-2+1=22
601 * lines per field, since we want lines 6 through 23.
602 */
603 lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
604 }
605
606 data[0] = s->handle;
607 /* Lines per field */
608 data[1] = (lines / 2) | ((lines / 2) << 16);
609 /* bytes per line */
610 data[2] = (raw ? vbi_active_samples
611 : (cx->is_60hz ? vbi_hblank_samples_60Hz
612 : vbi_hblank_samples_50Hz));
613 /* Every X number of frames a VBI interrupt arrives
614 (frames as in 25 or 30 fps) */
615 data[3] = 1;
616 /*
617 * Set the SAV/EAV RP codes to look for as start/stop points
618 * when in VIP-1.1 mode
619 */
620 if (raw) {
621 /*
622 * Start codes for beginning of "active" line in vertical blank
623 * 0x20 ( VerticalBlank )
624 * 0x60 ( EvenField VerticalBlank )
625 */
626 data[4] = 0x20602060;
627 /*
628 * End codes for end of "active" raw lines and regular lines
629 * 0x30 ( VerticalBlank HorizontalBlank)
630 * 0x70 ( EvenField VerticalBlank HorizontalBlank)
631 * 0x90 (Task HorizontalBlank)
632 * 0xd0 (Task EvenField HorizontalBlank)
633 */
634 data[5] = 0x307090d0;
635 } else {
636 /*
637 * End codes for active video, we want data in the hblank region
638 * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
639 * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
640 *
641 * Since the V bit is only allowed to toggle in the EAV RP code,
642 * just before the first active region line, these two
643 * are problematic:
644 * 0x90 (Task HorizontalBlank)
645 * 0xd0 (Task EvenField HorizontalBlank)
646 *
647 * We have set the digitzer such that we don't have to worry
648 * about these problem codes.
649 */
650 data[4] = 0xB0F0B0F0;
651 /*
652 * Start codes for beginning of active line in vertical blank
653 * 0xa0 (Task VerticalBlank )
654 * 0xe0 (Task EvenField VerticalBlank )
655 */
656 data[5] = 0xA0E0A0E0;
657 }
658
659 CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
660 data[0], data[1], data[2], data[3], data[4], data[5]);
661
662 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
663 }
664
cx18_stream_rotate_idx_mdls(struct cx18 * cx)665 void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
666 {
667 struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
668 struct cx18_mdl *mdl;
669
670 if (!cx18_stream_enabled(s))
671 return;
672
673 /* Return if the firmware is not running low on MDLs */
674 if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
675 CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
676 return;
677
678 /* Return if there are no MDLs to rotate back to the firmware */
679 if (atomic_read(&s->q_full.depth) < 2)
680 return;
681
682 /*
683 * Take the oldest IDX MDL still holding data, and discard its index
684 * entries by scheduling the MDL to go back to the firmware
685 */
686 mdl = cx18_dequeue(s, &s->q_full);
687 if (mdl != NULL)
688 cx18_enqueue(s, mdl, &s->q_free);
689 }
690
691 static
_cx18_stream_put_mdl_fw(struct cx18_stream * s,struct cx18_mdl * mdl)692 struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
693 struct cx18_mdl *mdl)
694 {
695 struct cx18 *cx = s->cx;
696 struct cx18_queue *q;
697
698 /* Don't give it to the firmware, if we're not running a capture */
699 if (s->handle == CX18_INVALID_TASK_HANDLE ||
700 test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
701 !test_bit(CX18_F_S_STREAMING, &s->s_flags))
702 return cx18_enqueue(s, mdl, &s->q_free);
703
704 q = cx18_enqueue(s, mdl, &s->q_busy);
705 if (q != &s->q_busy)
706 return q; /* The firmware has the max MDLs it can handle */
707
708 cx18_mdl_sync_for_device(s, mdl);
709 cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
710 (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
711 s->bufs_per_mdl, mdl->id, s->mdl_size);
712 return q;
713 }
714
715 static
_cx18_stream_load_fw_queue(struct cx18_stream * s)716 void _cx18_stream_load_fw_queue(struct cx18_stream *s)
717 {
718 struct cx18_queue *q;
719 struct cx18_mdl *mdl;
720
721 if (atomic_read(&s->q_free.depth) == 0 ||
722 atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
723 return;
724
725 /* Move from q_free to q_busy notifying the firmware, until the limit */
726 do {
727 mdl = cx18_dequeue(s, &s->q_free);
728 if (mdl == NULL)
729 break;
730 q = _cx18_stream_put_mdl_fw(s, mdl);
731 } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
732 && q == &s->q_busy);
733 }
734
cx18_out_work_handler(struct work_struct * work)735 void cx18_out_work_handler(struct work_struct *work)
736 {
737 struct cx18_stream *s =
738 container_of(work, struct cx18_stream, out_work_order);
739
740 _cx18_stream_load_fw_queue(s);
741 }
742
cx18_stream_configure_mdls(struct cx18_stream * s)743 static void cx18_stream_configure_mdls(struct cx18_stream *s)
744 {
745 cx18_unload_queues(s);
746
747 switch (s->type) {
748 case CX18_ENC_STREAM_TYPE_YUV:
749 /*
750 * Height should be a multiple of 32 lines.
751 * Set the MDL size to the exact size needed for one frame.
752 * Use enough buffers per MDL to cover the MDL size
753 */
754 if (s->pixelformat == V4L2_PIX_FMT_HM12)
755 s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
756 else
757 s->mdl_size = 720 * s->cx->cxhdl.height * 2;
758 s->bufs_per_mdl = s->mdl_size / s->buf_size;
759 if (s->mdl_size % s->buf_size)
760 s->bufs_per_mdl++;
761 break;
762 case CX18_ENC_STREAM_TYPE_VBI:
763 s->bufs_per_mdl = 1;
764 if (cx18_raw_vbi(s->cx)) {
765 s->mdl_size = (s->cx->is_60hz ? 12 : 18)
766 * 2 * vbi_active_samples;
767 } else {
768 /*
769 * See comment in cx18_vbi_setup() below about the
770 * extra lines we capture in sliced VBI mode due to
771 * the lines on which EAV RP codes toggle.
772 */
773 s->mdl_size = s->cx->is_60hz
774 ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
775 : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
776 }
777 break;
778 default:
779 s->bufs_per_mdl = 1;
780 s->mdl_size = s->buf_size * s->bufs_per_mdl;
781 break;
782 }
783
784 cx18_load_queues(s);
785 }
786
cx18_start_v4l2_encode_stream(struct cx18_stream * s)787 int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
788 {
789 u32 data[MAX_MB_ARGUMENTS];
790 struct cx18 *cx = s->cx;
791 int captype = 0;
792 struct cx18_stream *s_idx;
793
794 if (!cx18_stream_enabled(s))
795 return -EINVAL;
796
797 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
798
799 switch (s->type) {
800 case CX18_ENC_STREAM_TYPE_MPG:
801 captype = CAPTURE_CHANNEL_TYPE_MPEG;
802 cx->mpg_data_received = cx->vbi_data_inserted = 0;
803 cx->dualwatch_jiffies = jiffies;
804 cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
805 cx->search_pack_header = 0;
806 break;
807
808 case CX18_ENC_STREAM_TYPE_IDX:
809 captype = CAPTURE_CHANNEL_TYPE_INDEX;
810 break;
811 case CX18_ENC_STREAM_TYPE_TS:
812 captype = CAPTURE_CHANNEL_TYPE_TS;
813 break;
814 case CX18_ENC_STREAM_TYPE_YUV:
815 captype = CAPTURE_CHANNEL_TYPE_YUV;
816 break;
817 case CX18_ENC_STREAM_TYPE_PCM:
818 captype = CAPTURE_CHANNEL_TYPE_PCM;
819 break;
820 case CX18_ENC_STREAM_TYPE_VBI:
821 #ifdef CX18_ENCODER_PARSES_SLICED
822 captype = cx18_raw_vbi(cx) ?
823 CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
824 #else
825 /*
826 * Currently we set things up so that Sliced VBI from the
827 * digitizer is handled as Raw VBI by the encoder
828 */
829 captype = CAPTURE_CHANNEL_TYPE_VBI;
830 #endif
831 cx->vbi.frame = 0;
832 cx->vbi.inserted_frame = 0;
833 memset(cx->vbi.sliced_mpeg_size,
834 0, sizeof(cx->vbi.sliced_mpeg_size));
835 break;
836 default:
837 return -EINVAL;
838 }
839
840 /* Clear Streamoff flags in case left from last capture */
841 clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
842
843 cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
844 s->handle = data[0];
845 cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
846
847 /*
848 * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
849 * set up all the parameters, as it is not obvious which parameters the
850 * firmware shares across capture channel types and which it does not.
851 *
852 * Some of the cx18_vapi() calls below apply to only certain capture
853 * channel types. We're hoping there's no harm in calling most of them
854 * anyway, as long as the values are all consistent. Setting some
855 * shared parameters will have no effect once an analog capture channel
856 * has started streaming.
857 */
858 if (captype != CAPTURE_CHANNEL_TYPE_TS) {
859 cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
860 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
861 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
862 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
863
864 /*
865 * Audio related reset according to
866 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
867 */
868 if (atomic_read(&cx->ana_capturing) == 0)
869 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
870 s->handle, 12);
871
872 /*
873 * Number of lines for Field 1 & Field 2 according to
874 * Documentation/video4linux/cx2341x/fw-encoder-api.txt
875 * Field 1 is 312 for 625 line systems in BT.656
876 * Field 2 is 313 for 625 line systems in BT.656
877 */
878 cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
879 s->handle, 312, 313);
880
881 if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
882 cx18_vbi_setup(s);
883
884 /*
885 * Select to receive I, P, and B frame index entries, if the
886 * index stream is enabled. Otherwise disable index entry
887 * generation.
888 */
889 s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
890 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
891 s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
892
893 /* Call out to the common CX2341x API setup for user controls */
894 cx->cxhdl.priv = s;
895 cx2341x_handler_setup(&cx->cxhdl);
896
897 /*
898 * When starting a capture and we're set for radio,
899 * ensure the video is muted, despite the user control.
900 */
901 if (!cx->cxhdl.video_mute &&
902 test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
903 cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
904 (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
905
906 /* Enable the Video Format Converter for UYVY 4:2:2 support,
907 * rather than the default HM12 Macroblovk 4:2:0 support.
908 */
909 if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
910 if (s->pixelformat == V4L2_PIX_FMT_UYVY)
911 cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
912 s->handle, 1);
913 else
914 /* If in doubt, default to HM12 */
915 cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
916 s->handle, 0);
917 }
918 }
919
920 if (atomic_read(&cx->tot_capturing) == 0) {
921 cx2341x_handler_set_busy(&cx->cxhdl, 1);
922 clear_bit(CX18_F_I_EOS, &cx->i_flags);
923 cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
924 }
925
926 cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
927 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
928 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
929
930 /* Init all the cpu_mdls for this stream */
931 cx18_stream_configure_mdls(s);
932 _cx18_stream_load_fw_queue(s);
933
934 /* begin_capture */
935 if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
936 CX18_DEBUG_WARN("Error starting capture!\n");
937 /* Ensure we're really not capturing before releasing MDLs */
938 set_bit(CX18_F_S_STOPPING, &s->s_flags);
939 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
940 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
941 else
942 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
943 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
944 /* FIXME - CX18_F_S_STREAMOFF as well? */
945 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
946 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
947 s->handle = CX18_INVALID_TASK_HANDLE;
948 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
949 if (atomic_read(&cx->tot_capturing) == 0) {
950 set_bit(CX18_F_I_EOS, &cx->i_flags);
951 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
952 }
953 return -EINVAL;
954 }
955
956 /* you're live! sit back and await interrupts :) */
957 if (captype != CAPTURE_CHANNEL_TYPE_TS)
958 atomic_inc(&cx->ana_capturing);
959 atomic_inc(&cx->tot_capturing);
960 return 0;
961 }
962 EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
963
cx18_stop_all_captures(struct cx18 * cx)964 void cx18_stop_all_captures(struct cx18 *cx)
965 {
966 int i;
967
968 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
969 struct cx18_stream *s = &cx->streams[i];
970
971 if (!cx18_stream_enabled(s))
972 continue;
973 if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
974 cx18_stop_v4l2_encode_stream(s, 0);
975 }
976 }
977
cx18_stop_v4l2_encode_stream(struct cx18_stream * s,int gop_end)978 int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
979 {
980 struct cx18 *cx = s->cx;
981
982 if (!cx18_stream_enabled(s))
983 return -EINVAL;
984
985 /* This function assumes that you are allowed to stop the capture
986 and that we are actually capturing */
987
988 CX18_DEBUG_INFO("Stop Capture\n");
989
990 if (atomic_read(&cx->tot_capturing) == 0)
991 return 0;
992
993 set_bit(CX18_F_S_STOPPING, &s->s_flags);
994 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
995 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
996 else
997 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
998
999 if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
1000 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
1001 }
1002
1003 if (s->type != CX18_ENC_STREAM_TYPE_TS)
1004 atomic_dec(&cx->ana_capturing);
1005 atomic_dec(&cx->tot_capturing);
1006
1007 /* Clear capture and no-read bits */
1008 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
1009
1010 /* Tell the CX23418 it can't use our buffers anymore */
1011 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
1012
1013 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
1014 s->handle = CX18_INVALID_TASK_HANDLE;
1015 clear_bit(CX18_F_S_STOPPING, &s->s_flags);
1016
1017 if (atomic_read(&cx->tot_capturing) > 0)
1018 return 0;
1019
1020 cx2341x_handler_set_busy(&cx->cxhdl, 0);
1021 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
1022 wake_up(&s->waitq);
1023
1024 return 0;
1025 }
1026 EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
1027
cx18_find_handle(struct cx18 * cx)1028 u32 cx18_find_handle(struct cx18 *cx)
1029 {
1030 int i;
1031
1032 /* find first available handle to be used for global settings */
1033 for (i = 0; i < CX18_MAX_STREAMS; i++) {
1034 struct cx18_stream *s = &cx->streams[i];
1035
1036 if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
1037 return s->handle;
1038 }
1039 return CX18_INVALID_TASK_HANDLE;
1040 }
1041
cx18_handle_to_stream(struct cx18 * cx,u32 handle)1042 struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
1043 {
1044 int i;
1045 struct cx18_stream *s;
1046
1047 if (handle == CX18_INVALID_TASK_HANDLE)
1048 return NULL;
1049
1050 for (i = 0; i < CX18_MAX_STREAMS; i++) {
1051 s = &cx->streams[i];
1052 if (s->handle != handle)
1053 continue;
1054 if (cx18_stream_enabled(s))
1055 return s;
1056 }
1057 return NULL;
1058 }
1059