1 /*
2 * linux/drivers/video/omap2/dss/dss_features.c
3 *
4 * Copyright (C) 2010 Texas Instruments
5 * Author: Archit Taneja <archit@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/err.h>
24 #include <linux/slab.h>
25
26 #include <video/omapdss.h>
27
28 #include "dss.h"
29 #include "dss_features.h"
30
31 /* Defines a generic omap register field */
32 struct dss_reg_field {
33 u8 start, end;
34 };
35
36 struct dss_param_range {
37 int min, max;
38 };
39
40 struct omap_dss_features {
41 const struct dss_reg_field *reg_fields;
42 const int num_reg_fields;
43
44 const enum dss_feat_id *features;
45 const int num_features;
46
47 const int num_mgrs;
48 const int num_ovls;
49 const int num_wbs;
50 const enum omap_display_type *supported_displays;
51 const enum omap_dss_output_id *supported_outputs;
52 const enum omap_color_mode *supported_color_modes;
53 const enum omap_overlay_caps *overlay_caps;
54 const char * const *clksrc_names;
55 const struct dss_param_range *dss_params;
56
57 const enum omap_dss_rotation_type supported_rotation_types;
58
59 const u32 buffer_size_unit;
60 const u32 burst_size_unit;
61 };
62
63 /* This struct is assigned to one of the below during initialization */
64 static const struct omap_dss_features *omap_current_dss_features;
65
66 static const struct dss_reg_field omap2_dss_reg_fields[] = {
67 [FEAT_REG_FIRHINC] = { 11, 0 },
68 [FEAT_REG_FIRVINC] = { 27, 16 },
69 [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 },
70 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 },
71 [FEAT_REG_FIFOSIZE] = { 8, 0 },
72 [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
73 [FEAT_REG_VERTICALACCU] = { 25, 16 },
74 [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
75 [FEAT_REG_DSIPLL_REGN] = { 0, 0 },
76 [FEAT_REG_DSIPLL_REGM] = { 0, 0 },
77 [FEAT_REG_DSIPLL_REGM_DISPC] = { 0, 0 },
78 [FEAT_REG_DSIPLL_REGM_DSI] = { 0, 0 },
79 };
80
81 static const struct dss_reg_field omap3_dss_reg_fields[] = {
82 [FEAT_REG_FIRHINC] = { 12, 0 },
83 [FEAT_REG_FIRVINC] = { 28, 16 },
84 [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 },
85 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 },
86 [FEAT_REG_FIFOSIZE] = { 10, 0 },
87 [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
88 [FEAT_REG_VERTICALACCU] = { 25, 16 },
89 [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
90 [FEAT_REG_DSIPLL_REGN] = { 7, 1 },
91 [FEAT_REG_DSIPLL_REGM] = { 18, 8 },
92 [FEAT_REG_DSIPLL_REGM_DISPC] = { 22, 19 },
93 [FEAT_REG_DSIPLL_REGM_DSI] = { 26, 23 },
94 };
95
96 static const struct dss_reg_field am43xx_dss_reg_fields[] = {
97 [FEAT_REG_FIRHINC] = { 12, 0 },
98 [FEAT_REG_FIRVINC] = { 28, 16 },
99 [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 },
100 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 },
101 [FEAT_REG_FIFOSIZE] = { 10, 0 },
102 [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
103 [FEAT_REG_VERTICALACCU] = { 25, 16 },
104 [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
105 };
106
107 static const struct dss_reg_field omap4_dss_reg_fields[] = {
108 [FEAT_REG_FIRHINC] = { 12, 0 },
109 [FEAT_REG_FIRVINC] = { 28, 16 },
110 [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
111 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
112 [FEAT_REG_FIFOSIZE] = { 15, 0 },
113 [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
114 [FEAT_REG_VERTICALACCU] = { 26, 16 },
115 [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 },
116 [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
117 [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
118 [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
119 [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
120 };
121
122 static const struct dss_reg_field omap5_dss_reg_fields[] = {
123 [FEAT_REG_FIRHINC] = { 12, 0 },
124 [FEAT_REG_FIRVINC] = { 28, 16 },
125 [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
126 [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
127 [FEAT_REG_FIFOSIZE] = { 15, 0 },
128 [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
129 [FEAT_REG_VERTICALACCU] = { 26, 16 },
130 [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 7 },
131 [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
132 [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
133 [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
134 [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
135 };
136
137 static const enum omap_display_type omap2_dss_supported_displays[] = {
138 /* OMAP_DSS_CHANNEL_LCD */
139 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
140
141 /* OMAP_DSS_CHANNEL_DIGIT */
142 OMAP_DISPLAY_TYPE_VENC,
143 };
144
145 static const enum omap_display_type omap3430_dss_supported_displays[] = {
146 /* OMAP_DSS_CHANNEL_LCD */
147 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
148 OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
149
150 /* OMAP_DSS_CHANNEL_DIGIT */
151 OMAP_DISPLAY_TYPE_VENC,
152 };
153
154 static const enum omap_display_type omap3630_dss_supported_displays[] = {
155 /* OMAP_DSS_CHANNEL_LCD */
156 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
157 OMAP_DISPLAY_TYPE_DSI,
158
159 /* OMAP_DSS_CHANNEL_DIGIT */
160 OMAP_DISPLAY_TYPE_VENC,
161 };
162
163 static const enum omap_display_type am43xx_dss_supported_displays[] = {
164 /* OMAP_DSS_CHANNEL_LCD */
165 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
166 };
167
168 static const enum omap_display_type omap4_dss_supported_displays[] = {
169 /* OMAP_DSS_CHANNEL_LCD */
170 OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
171
172 /* OMAP_DSS_CHANNEL_DIGIT */
173 OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
174
175 /* OMAP_DSS_CHANNEL_LCD2 */
176 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
177 OMAP_DISPLAY_TYPE_DSI,
178 };
179
180 static const enum omap_display_type omap5_dss_supported_displays[] = {
181 /* OMAP_DSS_CHANNEL_LCD */
182 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
183 OMAP_DISPLAY_TYPE_DSI,
184
185 /* OMAP_DSS_CHANNEL_DIGIT */
186 OMAP_DISPLAY_TYPE_HDMI | OMAP_DISPLAY_TYPE_DPI,
187
188 /* OMAP_DSS_CHANNEL_LCD2 */
189 OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
190 OMAP_DISPLAY_TYPE_DSI,
191 };
192
193 static const enum omap_dss_output_id omap2_dss_supported_outputs[] = {
194 /* OMAP_DSS_CHANNEL_LCD */
195 OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
196
197 /* OMAP_DSS_CHANNEL_DIGIT */
198 OMAP_DSS_OUTPUT_VENC,
199 };
200
201 static const enum omap_dss_output_id omap3430_dss_supported_outputs[] = {
202 /* OMAP_DSS_CHANNEL_LCD */
203 OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
204 OMAP_DSS_OUTPUT_SDI | OMAP_DSS_OUTPUT_DSI1,
205
206 /* OMAP_DSS_CHANNEL_DIGIT */
207 OMAP_DSS_OUTPUT_VENC,
208 };
209
210 static const enum omap_dss_output_id omap3630_dss_supported_outputs[] = {
211 /* OMAP_DSS_CHANNEL_LCD */
212 OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
213 OMAP_DSS_OUTPUT_DSI1,
214
215 /* OMAP_DSS_CHANNEL_DIGIT */
216 OMAP_DSS_OUTPUT_VENC,
217 };
218
219 static const enum omap_dss_output_id am43xx_dss_supported_outputs[] = {
220 /* OMAP_DSS_CHANNEL_LCD */
221 OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
222 };
223
224 static const enum omap_dss_output_id omap4_dss_supported_outputs[] = {
225 /* OMAP_DSS_CHANNEL_LCD */
226 OMAP_DSS_OUTPUT_DBI | OMAP_DSS_OUTPUT_DSI1,
227
228 /* OMAP_DSS_CHANNEL_DIGIT */
229 OMAP_DSS_OUTPUT_VENC | OMAP_DSS_OUTPUT_HDMI,
230
231 /* OMAP_DSS_CHANNEL_LCD2 */
232 OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
233 OMAP_DSS_OUTPUT_DSI2,
234 };
235
236 static const enum omap_dss_output_id omap5_dss_supported_outputs[] = {
237 /* OMAP_DSS_CHANNEL_LCD */
238 OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
239 OMAP_DSS_OUTPUT_DSI1 | OMAP_DSS_OUTPUT_DSI2,
240
241 /* OMAP_DSS_CHANNEL_DIGIT */
242 OMAP_DSS_OUTPUT_HDMI | OMAP_DSS_OUTPUT_DPI,
243
244 /* OMAP_DSS_CHANNEL_LCD2 */
245 OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
246 OMAP_DSS_OUTPUT_DSI1,
247
248 /* OMAP_DSS_CHANNEL_LCD3 */
249 OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
250 OMAP_DSS_OUTPUT_DSI2,
251 };
252
253 static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
254 /* OMAP_DSS_GFX */
255 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
256 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
257 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
258 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
259
260 /* OMAP_DSS_VIDEO1 */
261 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
262 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
263 OMAP_DSS_COLOR_UYVY,
264
265 /* OMAP_DSS_VIDEO2 */
266 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
267 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
268 OMAP_DSS_COLOR_UYVY,
269 };
270
271 static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
272 /* OMAP_DSS_GFX */
273 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
274 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
275 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
276 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
277 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
278 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
279
280 /* OMAP_DSS_VIDEO1 */
281 OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
282 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
283 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
284
285 /* OMAP_DSS_VIDEO2 */
286 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
287 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
288 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
289 OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
290 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
291 };
292
293 static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
294 /* OMAP_DSS_GFX */
295 OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
296 OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
297 OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
298 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
299 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
300 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
301 OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
302 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
303
304 /* OMAP_DSS_VIDEO1 */
305 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
306 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
307 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
308 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
309 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
310 OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
311 OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
312 OMAP_DSS_COLOR_RGBX32,
313
314 /* OMAP_DSS_VIDEO2 */
315 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
316 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
317 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
318 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
319 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
320 OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
321 OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
322 OMAP_DSS_COLOR_RGBX32,
323
324 /* OMAP_DSS_VIDEO3 */
325 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
326 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
327 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
328 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
329 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
330 OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
331 OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
332 OMAP_DSS_COLOR_RGBX32,
333
334 /* OMAP_DSS_WB */
335 OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
336 OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
337 OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
338 OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
339 OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
340 OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
341 OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
342 OMAP_DSS_COLOR_RGBX32,
343 };
344
345 static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
346 /* OMAP_DSS_GFX */
347 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
348
349 /* OMAP_DSS_VIDEO1 */
350 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
351 OMAP_DSS_OVL_CAP_REPLICATION,
352
353 /* OMAP_DSS_VIDEO2 */
354 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
355 OMAP_DSS_OVL_CAP_REPLICATION,
356 };
357
358 static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = {
359 /* OMAP_DSS_GFX */
360 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_POS |
361 OMAP_DSS_OVL_CAP_REPLICATION,
362
363 /* OMAP_DSS_VIDEO1 */
364 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
365 OMAP_DSS_OVL_CAP_REPLICATION,
366
367 /* OMAP_DSS_VIDEO2 */
368 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
369 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
370 };
371
372 static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = {
373 /* OMAP_DSS_GFX */
374 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
375 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
376
377 /* OMAP_DSS_VIDEO1 */
378 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
379 OMAP_DSS_OVL_CAP_REPLICATION,
380
381 /* OMAP_DSS_VIDEO2 */
382 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
383 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_POS |
384 OMAP_DSS_OVL_CAP_REPLICATION,
385 };
386
387 static const enum omap_overlay_caps omap4_dss_overlay_caps[] = {
388 /* OMAP_DSS_GFX */
389 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
390 OMAP_DSS_OVL_CAP_ZORDER | OMAP_DSS_OVL_CAP_POS |
391 OMAP_DSS_OVL_CAP_REPLICATION,
392
393 /* OMAP_DSS_VIDEO1 */
394 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
395 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
396 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
397
398 /* OMAP_DSS_VIDEO2 */
399 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
400 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
401 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
402
403 /* OMAP_DSS_VIDEO3 */
404 OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
405 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
406 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
407 };
408
409 static const char * const omap2_dss_clk_source_names[] = {
410 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A",
411 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A",
412 [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK1",
413 };
414
415 static const char * const omap3_dss_clk_source_names[] = {
416 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK",
417 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK",
418 [OMAP_DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK",
419 };
420
421 static const char * const omap4_dss_clk_source_names[] = {
422 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1",
423 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2",
424 [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK",
425 [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
426 [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2",
427 };
428
429 static const char * const omap5_dss_clk_source_names[] = {
430 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DPLL_DSI1_A_CLK1",
431 [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DPLL_DSI1_A_CLK2",
432 [OMAP_DSS_CLK_SRC_FCK] = "DSS_CLK",
433 [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "DPLL_DSI1_C_CLK1",
434 [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "DPLL_DSI1_C_CLK2",
435 };
436
437 static const struct dss_param_range omap2_dss_param_range[] = {
438 [FEAT_PARAM_DSS_FCK] = { 0, 133000000 },
439 [FEAT_PARAM_DSS_PCD] = { 2, 255 },
440 [FEAT_PARAM_DSIPLL_REGN] = { 0, 0 },
441 [FEAT_PARAM_DSIPLL_REGM] = { 0, 0 },
442 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 },
443 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 },
444 [FEAT_PARAM_DSIPLL_FINT] = { 0, 0 },
445 [FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 },
446 [FEAT_PARAM_DOWNSCALE] = { 1, 2 },
447 /*
448 * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC
449 * scaler cannot scale a image with width more than 768.
450 */
451 [FEAT_PARAM_LINEWIDTH] = { 1, 768 },
452 };
453
454 static const struct dss_param_range omap3_dss_param_range[] = {
455 [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
456 [FEAT_PARAM_DSS_PCD] = { 1, 255 },
457 [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 },
458 [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 },
459 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 },
460 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 },
461 [FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 },
462 [FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1},
463 [FEAT_PARAM_DSI_FCK] = { 0, 173000000 },
464 [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
465 [FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
466 };
467
468 static const struct dss_param_range am43xx_dss_param_range[] = {
469 [FEAT_PARAM_DSS_FCK] = { 0, 200000000 },
470 [FEAT_PARAM_DSS_PCD] = { 2, 255 },
471 [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
472 [FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
473 };
474
475 static const struct dss_param_range omap4_dss_param_range[] = {
476 [FEAT_PARAM_DSS_FCK] = { 0, 186000000 },
477 [FEAT_PARAM_DSS_PCD] = { 1, 255 },
478 [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
479 [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
480 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
481 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
482 [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
483 [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
484 [FEAT_PARAM_DSI_FCK] = { 0, 170000000 },
485 [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
486 [FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
487 };
488
489 static const struct dss_param_range omap5_dss_param_range[] = {
490 [FEAT_PARAM_DSS_FCK] = { 0, 209250000 },
491 [FEAT_PARAM_DSS_PCD] = { 1, 255 },
492 [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
493 [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
494 [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
495 [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
496 [FEAT_PARAM_DSIPLL_FINT] = { 150000, 52000000 },
497 [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
498 [FEAT_PARAM_DSI_FCK] = { 0, 209250000 },
499 [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
500 [FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
501 };
502
503 static const enum dss_feat_id omap2_dss_feat_list[] = {
504 FEAT_LCDENABLEPOL,
505 FEAT_LCDENABLESIGNAL,
506 FEAT_PCKFREEENABLE,
507 FEAT_FUNCGATED,
508 FEAT_ROWREPEATENABLE,
509 FEAT_RESIZECONF,
510 };
511
512 static const enum dss_feat_id omap3430_dss_feat_list[] = {
513 FEAT_LCDENABLEPOL,
514 FEAT_LCDENABLESIGNAL,
515 FEAT_PCKFREEENABLE,
516 FEAT_FUNCGATED,
517 FEAT_LINEBUFFERSPLIT,
518 FEAT_ROWREPEATENABLE,
519 FEAT_RESIZECONF,
520 FEAT_DSI_PLL_FREQSEL,
521 FEAT_DSI_REVERSE_TXCLKESC,
522 FEAT_VENC_REQUIRES_TV_DAC_CLK,
523 FEAT_CPR,
524 FEAT_PRELOAD,
525 FEAT_FIR_COEF_V,
526 FEAT_ALPHA_FIXED_ZORDER,
527 FEAT_FIFO_MERGE,
528 FEAT_OMAP3_DSI_FIFO_BUG,
529 FEAT_DPI_USES_VDDS_DSI,
530 };
531
532 static const enum dss_feat_id am35xx_dss_feat_list[] = {
533 FEAT_LCDENABLEPOL,
534 FEAT_LCDENABLESIGNAL,
535 FEAT_PCKFREEENABLE,
536 FEAT_FUNCGATED,
537 FEAT_LINEBUFFERSPLIT,
538 FEAT_ROWREPEATENABLE,
539 FEAT_RESIZECONF,
540 FEAT_DSI_PLL_FREQSEL,
541 FEAT_DSI_REVERSE_TXCLKESC,
542 FEAT_VENC_REQUIRES_TV_DAC_CLK,
543 FEAT_CPR,
544 FEAT_PRELOAD,
545 FEAT_FIR_COEF_V,
546 FEAT_ALPHA_FIXED_ZORDER,
547 FEAT_FIFO_MERGE,
548 FEAT_OMAP3_DSI_FIFO_BUG,
549 };
550
551 static const enum dss_feat_id am43xx_dss_feat_list[] = {
552 FEAT_LCDENABLEPOL,
553 FEAT_LCDENABLESIGNAL,
554 FEAT_PCKFREEENABLE,
555 FEAT_FUNCGATED,
556 FEAT_LINEBUFFERSPLIT,
557 FEAT_ROWREPEATENABLE,
558 FEAT_RESIZECONF,
559 FEAT_CPR,
560 FEAT_PRELOAD,
561 FEAT_FIR_COEF_V,
562 FEAT_ALPHA_FIXED_ZORDER,
563 FEAT_FIFO_MERGE,
564 };
565
566 static const enum dss_feat_id omap3630_dss_feat_list[] = {
567 FEAT_LCDENABLEPOL,
568 FEAT_LCDENABLESIGNAL,
569 FEAT_PCKFREEENABLE,
570 FEAT_FUNCGATED,
571 FEAT_LINEBUFFERSPLIT,
572 FEAT_ROWREPEATENABLE,
573 FEAT_RESIZECONF,
574 FEAT_DSI_PLL_PWR_BUG,
575 FEAT_DSI_PLL_FREQSEL,
576 FEAT_CPR,
577 FEAT_PRELOAD,
578 FEAT_FIR_COEF_V,
579 FEAT_ALPHA_FIXED_ZORDER,
580 FEAT_FIFO_MERGE,
581 FEAT_OMAP3_DSI_FIFO_BUG,
582 FEAT_DPI_USES_VDDS_DSI,
583 };
584
585 static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = {
586 FEAT_MGR_LCD2,
587 FEAT_CORE_CLK_DIV,
588 FEAT_LCD_CLK_SRC,
589 FEAT_DSI_DCS_CMD_CONFIG_VC,
590 FEAT_DSI_VC_OCP_WIDTH,
591 FEAT_DSI_GNQ,
592 FEAT_HANDLE_UV_SEPARATE,
593 FEAT_ATTR2,
594 FEAT_CPR,
595 FEAT_PRELOAD,
596 FEAT_FIR_COEF_V,
597 FEAT_ALPHA_FREE_ZORDER,
598 FEAT_FIFO_MERGE,
599 FEAT_BURST_2D,
600 };
601
602 static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = {
603 FEAT_MGR_LCD2,
604 FEAT_CORE_CLK_DIV,
605 FEAT_LCD_CLK_SRC,
606 FEAT_DSI_DCS_CMD_CONFIG_VC,
607 FEAT_DSI_VC_OCP_WIDTH,
608 FEAT_DSI_GNQ,
609 FEAT_HDMI_CTS_SWMODE,
610 FEAT_HANDLE_UV_SEPARATE,
611 FEAT_ATTR2,
612 FEAT_CPR,
613 FEAT_PRELOAD,
614 FEAT_FIR_COEF_V,
615 FEAT_ALPHA_FREE_ZORDER,
616 FEAT_FIFO_MERGE,
617 FEAT_BURST_2D,
618 };
619
620 static const enum dss_feat_id omap4_dss_feat_list[] = {
621 FEAT_MGR_LCD2,
622 FEAT_CORE_CLK_DIV,
623 FEAT_LCD_CLK_SRC,
624 FEAT_DSI_DCS_CMD_CONFIG_VC,
625 FEAT_DSI_VC_OCP_WIDTH,
626 FEAT_DSI_GNQ,
627 FEAT_HDMI_CTS_SWMODE,
628 FEAT_HDMI_AUDIO_USE_MCLK,
629 FEAT_HANDLE_UV_SEPARATE,
630 FEAT_ATTR2,
631 FEAT_CPR,
632 FEAT_PRELOAD,
633 FEAT_FIR_COEF_V,
634 FEAT_ALPHA_FREE_ZORDER,
635 FEAT_FIFO_MERGE,
636 FEAT_BURST_2D,
637 };
638
639 static const enum dss_feat_id omap5_dss_feat_list[] = {
640 FEAT_MGR_LCD2,
641 FEAT_MGR_LCD3,
642 FEAT_CORE_CLK_DIV,
643 FEAT_LCD_CLK_SRC,
644 FEAT_DSI_DCS_CMD_CONFIG_VC,
645 FEAT_DSI_VC_OCP_WIDTH,
646 FEAT_DSI_GNQ,
647 FEAT_HDMI_CTS_SWMODE,
648 FEAT_HDMI_AUDIO_USE_MCLK,
649 FEAT_HANDLE_UV_SEPARATE,
650 FEAT_ATTR2,
651 FEAT_CPR,
652 FEAT_PRELOAD,
653 FEAT_FIR_COEF_V,
654 FEAT_ALPHA_FREE_ZORDER,
655 FEAT_FIFO_MERGE,
656 FEAT_BURST_2D,
657 FEAT_DSI_PLL_SELFREQDCO,
658 FEAT_DSI_PLL_REFSEL,
659 FEAT_DSI_PHY_DCC,
660 FEAT_MFLAG,
661 };
662
663 /* OMAP2 DSS Features */
664 static const struct omap_dss_features omap2_dss_features = {
665 .reg_fields = omap2_dss_reg_fields,
666 .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
667
668 .features = omap2_dss_feat_list,
669 .num_features = ARRAY_SIZE(omap2_dss_feat_list),
670
671 .num_mgrs = 2,
672 .num_ovls = 3,
673 .supported_displays = omap2_dss_supported_displays,
674 .supported_outputs = omap2_dss_supported_outputs,
675 .supported_color_modes = omap2_dss_supported_color_modes,
676 .overlay_caps = omap2_dss_overlay_caps,
677 .clksrc_names = omap2_dss_clk_source_names,
678 .dss_params = omap2_dss_param_range,
679 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
680 .buffer_size_unit = 1,
681 .burst_size_unit = 8,
682 };
683
684 /* OMAP3 DSS Features */
685 static const struct omap_dss_features omap3430_dss_features = {
686 .reg_fields = omap3_dss_reg_fields,
687 .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
688
689 .features = omap3430_dss_feat_list,
690 .num_features = ARRAY_SIZE(omap3430_dss_feat_list),
691
692 .num_mgrs = 2,
693 .num_ovls = 3,
694 .supported_displays = omap3430_dss_supported_displays,
695 .supported_outputs = omap3430_dss_supported_outputs,
696 .supported_color_modes = omap3_dss_supported_color_modes,
697 .overlay_caps = omap3430_dss_overlay_caps,
698 .clksrc_names = omap3_dss_clk_source_names,
699 .dss_params = omap3_dss_param_range,
700 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
701 .buffer_size_unit = 1,
702 .burst_size_unit = 8,
703 };
704
705 /*
706 * AM35xx DSS Features. This is basically OMAP3 DSS Features without the
707 * vdds_dsi regulator.
708 */
709 static const struct omap_dss_features am35xx_dss_features = {
710 .reg_fields = omap3_dss_reg_fields,
711 .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
712
713 .features = am35xx_dss_feat_list,
714 .num_features = ARRAY_SIZE(am35xx_dss_feat_list),
715
716 .num_mgrs = 2,
717 .num_ovls = 3,
718 .supported_displays = omap3430_dss_supported_displays,
719 .supported_outputs = omap3430_dss_supported_outputs,
720 .supported_color_modes = omap3_dss_supported_color_modes,
721 .overlay_caps = omap3430_dss_overlay_caps,
722 .clksrc_names = omap3_dss_clk_source_names,
723 .dss_params = omap3_dss_param_range,
724 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
725 .buffer_size_unit = 1,
726 .burst_size_unit = 8,
727 };
728
729 static const struct omap_dss_features am43xx_dss_features = {
730 .reg_fields = am43xx_dss_reg_fields,
731 .num_reg_fields = ARRAY_SIZE(am43xx_dss_reg_fields),
732
733 .features = am43xx_dss_feat_list,
734 .num_features = ARRAY_SIZE(am43xx_dss_feat_list),
735
736 .num_mgrs = 1,
737 .num_ovls = 3,
738 .supported_displays = am43xx_dss_supported_displays,
739 .supported_outputs = am43xx_dss_supported_outputs,
740 .supported_color_modes = omap3_dss_supported_color_modes,
741 .overlay_caps = omap3430_dss_overlay_caps,
742 .clksrc_names = omap2_dss_clk_source_names,
743 .dss_params = am43xx_dss_param_range,
744 .supported_rotation_types = OMAP_DSS_ROT_DMA,
745 .buffer_size_unit = 1,
746 .burst_size_unit = 8,
747 };
748
749 static const struct omap_dss_features omap3630_dss_features = {
750 .reg_fields = omap3_dss_reg_fields,
751 .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
752
753 .features = omap3630_dss_feat_list,
754 .num_features = ARRAY_SIZE(omap3630_dss_feat_list),
755
756 .num_mgrs = 2,
757 .num_ovls = 3,
758 .supported_displays = omap3630_dss_supported_displays,
759 .supported_outputs = omap3630_dss_supported_outputs,
760 .supported_color_modes = omap3_dss_supported_color_modes,
761 .overlay_caps = omap3630_dss_overlay_caps,
762 .clksrc_names = omap3_dss_clk_source_names,
763 .dss_params = omap3_dss_param_range,
764 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
765 .buffer_size_unit = 1,
766 .burst_size_unit = 8,
767 };
768
769 /* OMAP4 DSS Features */
770 /* For OMAP4430 ES 1.0 revision */
771 static const struct omap_dss_features omap4430_es1_0_dss_features = {
772 .reg_fields = omap4_dss_reg_fields,
773 .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
774
775 .features = omap4430_es1_0_dss_feat_list,
776 .num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list),
777
778 .num_mgrs = 3,
779 .num_ovls = 4,
780 .num_wbs = 1,
781 .supported_displays = omap4_dss_supported_displays,
782 .supported_outputs = omap4_dss_supported_outputs,
783 .supported_color_modes = omap4_dss_supported_color_modes,
784 .overlay_caps = omap4_dss_overlay_caps,
785 .clksrc_names = omap4_dss_clk_source_names,
786 .dss_params = omap4_dss_param_range,
787 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
788 .buffer_size_unit = 16,
789 .burst_size_unit = 16,
790 };
791
792 /* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */
793 static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
794 .reg_fields = omap4_dss_reg_fields,
795 .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
796
797 .features = omap4430_es2_0_1_2_dss_feat_list,
798 .num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list),
799
800 .num_mgrs = 3,
801 .num_ovls = 4,
802 .num_wbs = 1,
803 .supported_displays = omap4_dss_supported_displays,
804 .supported_outputs = omap4_dss_supported_outputs,
805 .supported_color_modes = omap4_dss_supported_color_modes,
806 .overlay_caps = omap4_dss_overlay_caps,
807 .clksrc_names = omap4_dss_clk_source_names,
808 .dss_params = omap4_dss_param_range,
809 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
810 .buffer_size_unit = 16,
811 .burst_size_unit = 16,
812 };
813
814 /* For all the other OMAP4 versions */
815 static const struct omap_dss_features omap4_dss_features = {
816 .reg_fields = omap4_dss_reg_fields,
817 .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
818
819 .features = omap4_dss_feat_list,
820 .num_features = ARRAY_SIZE(omap4_dss_feat_list),
821
822 .num_mgrs = 3,
823 .num_ovls = 4,
824 .num_wbs = 1,
825 .supported_displays = omap4_dss_supported_displays,
826 .supported_outputs = omap4_dss_supported_outputs,
827 .supported_color_modes = omap4_dss_supported_color_modes,
828 .overlay_caps = omap4_dss_overlay_caps,
829 .clksrc_names = omap4_dss_clk_source_names,
830 .dss_params = omap4_dss_param_range,
831 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
832 .buffer_size_unit = 16,
833 .burst_size_unit = 16,
834 };
835
836 /* OMAP5 DSS Features */
837 static const struct omap_dss_features omap5_dss_features = {
838 .reg_fields = omap5_dss_reg_fields,
839 .num_reg_fields = ARRAY_SIZE(omap5_dss_reg_fields),
840
841 .features = omap5_dss_feat_list,
842 .num_features = ARRAY_SIZE(omap5_dss_feat_list),
843
844 .num_mgrs = 4,
845 .num_ovls = 4,
846 .supported_displays = omap5_dss_supported_displays,
847 .supported_outputs = omap5_dss_supported_outputs,
848 .supported_color_modes = omap4_dss_supported_color_modes,
849 .overlay_caps = omap4_dss_overlay_caps,
850 .clksrc_names = omap5_dss_clk_source_names,
851 .dss_params = omap5_dss_param_range,
852 .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
853 .buffer_size_unit = 16,
854 .burst_size_unit = 16,
855 };
856
857 /* Functions returning values related to a DSS feature */
dss_feat_get_num_mgrs(void)858 int dss_feat_get_num_mgrs(void)
859 {
860 return omap_current_dss_features->num_mgrs;
861 }
862 EXPORT_SYMBOL(dss_feat_get_num_mgrs);
863
dss_feat_get_num_ovls(void)864 int dss_feat_get_num_ovls(void)
865 {
866 return omap_current_dss_features->num_ovls;
867 }
868 EXPORT_SYMBOL(dss_feat_get_num_ovls);
869
dss_feat_get_num_wbs(void)870 int dss_feat_get_num_wbs(void)
871 {
872 return omap_current_dss_features->num_wbs;
873 }
874
dss_feat_get_param_min(enum dss_range_param param)875 unsigned long dss_feat_get_param_min(enum dss_range_param param)
876 {
877 return omap_current_dss_features->dss_params[param].min;
878 }
879
dss_feat_get_param_max(enum dss_range_param param)880 unsigned long dss_feat_get_param_max(enum dss_range_param param)
881 {
882 return omap_current_dss_features->dss_params[param].max;
883 }
884
dss_feat_get_supported_displays(enum omap_channel channel)885 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
886 {
887 return omap_current_dss_features->supported_displays[channel];
888 }
889 EXPORT_SYMBOL(dss_feat_get_supported_displays);
890
dss_feat_get_supported_outputs(enum omap_channel channel)891 enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel)
892 {
893 return omap_current_dss_features->supported_outputs[channel];
894 }
895 EXPORT_SYMBOL(dss_feat_get_supported_outputs);
896
dss_feat_get_supported_color_modes(enum omap_plane plane)897 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
898 {
899 return omap_current_dss_features->supported_color_modes[plane];
900 }
901 EXPORT_SYMBOL(dss_feat_get_supported_color_modes);
902
dss_feat_get_overlay_caps(enum omap_plane plane)903 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
904 {
905 return omap_current_dss_features->overlay_caps[plane];
906 }
907
dss_feat_color_mode_supported(enum omap_plane plane,enum omap_color_mode color_mode)908 bool dss_feat_color_mode_supported(enum omap_plane plane,
909 enum omap_color_mode color_mode)
910 {
911 return omap_current_dss_features->supported_color_modes[plane] &
912 color_mode;
913 }
914
dss_feat_get_clk_source_name(enum omap_dss_clk_source id)915 const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
916 {
917 return omap_current_dss_features->clksrc_names[id];
918 }
919
dss_feat_get_buffer_size_unit(void)920 u32 dss_feat_get_buffer_size_unit(void)
921 {
922 return omap_current_dss_features->buffer_size_unit;
923 }
924
dss_feat_get_burst_size_unit(void)925 u32 dss_feat_get_burst_size_unit(void)
926 {
927 return omap_current_dss_features->burst_size_unit;
928 }
929
930 /* DSS has_feature check */
dss_has_feature(enum dss_feat_id id)931 bool dss_has_feature(enum dss_feat_id id)
932 {
933 int i;
934 const enum dss_feat_id *features = omap_current_dss_features->features;
935 const int num_features = omap_current_dss_features->num_features;
936
937 for (i = 0; i < num_features; i++) {
938 if (features[i] == id)
939 return true;
940 }
941
942 return false;
943 }
944
dss_feat_get_reg_field(enum dss_feat_reg_field id,u8 * start,u8 * end)945 void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
946 {
947 if (id >= omap_current_dss_features->num_reg_fields)
948 BUG();
949
950 *start = omap_current_dss_features->reg_fields[id].start;
951 *end = omap_current_dss_features->reg_fields[id].end;
952 }
953
dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)954 bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
955 {
956 return omap_current_dss_features->supported_rotation_types & rot_type;
957 }
958
dss_features_init(enum omapdss_version version)959 void dss_features_init(enum omapdss_version version)
960 {
961 switch (version) {
962 case OMAPDSS_VER_OMAP24xx:
963 omap_current_dss_features = &omap2_dss_features;
964 break;
965
966 case OMAPDSS_VER_OMAP34xx_ES1:
967 case OMAPDSS_VER_OMAP34xx_ES3:
968 omap_current_dss_features = &omap3430_dss_features;
969 break;
970
971 case OMAPDSS_VER_OMAP3630:
972 omap_current_dss_features = &omap3630_dss_features;
973 break;
974
975 case OMAPDSS_VER_OMAP4430_ES1:
976 omap_current_dss_features = &omap4430_es1_0_dss_features;
977 break;
978
979 case OMAPDSS_VER_OMAP4430_ES2:
980 omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
981 break;
982
983 case OMAPDSS_VER_OMAP4:
984 omap_current_dss_features = &omap4_dss_features;
985 break;
986
987 case OMAPDSS_VER_OMAP5:
988 omap_current_dss_features = &omap5_dss_features;
989 break;
990
991 case OMAPDSS_VER_AM35xx:
992 omap_current_dss_features = &am35xx_dss_features;
993 break;
994
995 case OMAPDSS_VER_AM43xx:
996 omap_current_dss_features = &am43xx_dss_features;
997 break;
998
999 default:
1000 DSSWARN("Unsupported OMAP version");
1001 break;
1002 }
1003 }
1004