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1 /*
2  * ARMv8 single-step debug support and mdscr context switching.
3  *
4  * Copyright (C) 2012 ARM Limited
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
17  *
18  * Author: Will Deacon <will.deacon@arm.com>
19  */
20 
21 #include <linux/cpu.h>
22 #include <linux/debugfs.h>
23 #include <linux/hardirq.h>
24 #include <linux/init.h>
25 #include <linux/ptrace.h>
26 #include <linux/stat.h>
27 #include <linux/uaccess.h>
28 
29 #include <asm/cpufeature.h>
30 #include <asm/cputype.h>
31 #include <asm/debug-monitors.h>
32 #include <asm/system_misc.h>
33 
34 /* Determine debug architecture. */
debug_monitors_arch(void)35 u8 debug_monitors_arch(void)
36 {
37 	return cpuid_feature_extract_field(read_system_reg(SYS_ID_AA64DFR0_EL1),
38 						ID_AA64DFR0_DEBUGVER_SHIFT);
39 }
40 
41 /*
42  * MDSCR access routines.
43  */
mdscr_write(u32 mdscr)44 static void mdscr_write(u32 mdscr)
45 {
46 	unsigned long flags;
47 	local_dbg_save(flags);
48 	asm volatile("msr mdscr_el1, %0" :: "r" (mdscr));
49 	local_dbg_restore(flags);
50 }
51 
mdscr_read(void)52 static u32 mdscr_read(void)
53 {
54 	u32 mdscr;
55 	asm volatile("mrs %0, mdscr_el1" : "=r" (mdscr));
56 	return mdscr;
57 }
58 
59 /*
60  * Allow root to disable self-hosted debug from userspace.
61  * This is useful if you want to connect an external JTAG debugger.
62  */
63 static u32 debug_enabled = 1;
64 
create_debug_debugfs_entry(void)65 static int create_debug_debugfs_entry(void)
66 {
67 	debugfs_create_bool("debug_enabled", 0644, NULL, &debug_enabled);
68 	return 0;
69 }
70 fs_initcall(create_debug_debugfs_entry);
71 
early_debug_disable(char * buf)72 static int __init early_debug_disable(char *buf)
73 {
74 	debug_enabled = 0;
75 	return 0;
76 }
77 
78 early_param("nodebugmon", early_debug_disable);
79 
80 /*
81  * Keep track of debug users on each core.
82  * The ref counts are per-cpu so we use a local_t type.
83  */
84 static DEFINE_PER_CPU(int, mde_ref_count);
85 static DEFINE_PER_CPU(int, kde_ref_count);
86 
enable_debug_monitors(enum debug_el el)87 void enable_debug_monitors(enum debug_el el)
88 {
89 	u32 mdscr, enable = 0;
90 
91 	WARN_ON(preemptible());
92 
93 	if (this_cpu_inc_return(mde_ref_count) == 1)
94 		enable = DBG_MDSCR_MDE;
95 
96 	if (el == DBG_ACTIVE_EL1 &&
97 	    this_cpu_inc_return(kde_ref_count) == 1)
98 		enable |= DBG_MDSCR_KDE;
99 
100 	if (enable && debug_enabled) {
101 		mdscr = mdscr_read();
102 		mdscr |= enable;
103 		mdscr_write(mdscr);
104 	}
105 }
106 
disable_debug_monitors(enum debug_el el)107 void disable_debug_monitors(enum debug_el el)
108 {
109 	u32 mdscr, disable = 0;
110 
111 	WARN_ON(preemptible());
112 
113 	if (this_cpu_dec_return(mde_ref_count) == 0)
114 		disable = ~DBG_MDSCR_MDE;
115 
116 	if (el == DBG_ACTIVE_EL1 &&
117 	    this_cpu_dec_return(kde_ref_count) == 0)
118 		disable &= ~DBG_MDSCR_KDE;
119 
120 	if (disable) {
121 		mdscr = mdscr_read();
122 		mdscr &= disable;
123 		mdscr_write(mdscr);
124 	}
125 }
126 
127 /*
128  * OS lock clearing.
129  */
clear_os_lock(void * unused)130 static void clear_os_lock(void *unused)
131 {
132 	asm volatile("msr oslar_el1, %0" : : "r" (0));
133 }
134 
os_lock_notify(struct notifier_block * self,unsigned long action,void * data)135 static int os_lock_notify(struct notifier_block *self,
136 				    unsigned long action, void *data)
137 {
138 	int cpu = (unsigned long)data;
139 	if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
140 		smp_call_function_single(cpu, clear_os_lock, NULL, 1);
141 	return NOTIFY_OK;
142 }
143 
144 static struct notifier_block os_lock_nb = {
145 	.notifier_call = os_lock_notify,
146 };
147 
debug_monitors_init(void)148 static int debug_monitors_init(void)
149 {
150 	cpu_notifier_register_begin();
151 
152 	/* Clear the OS lock. */
153 	on_each_cpu(clear_os_lock, NULL, 1);
154 	isb();
155 
156 	/* Register hotplug handler. */
157 	__register_cpu_notifier(&os_lock_nb);
158 
159 	cpu_notifier_register_done();
160 	return 0;
161 }
162 postcore_initcall(debug_monitors_init);
163 
164 /*
165  * Single step API and exception handling.
166  */
set_regs_spsr_ss(struct pt_regs * regs)167 static void set_regs_spsr_ss(struct pt_regs *regs)
168 {
169 	unsigned long spsr;
170 
171 	spsr = regs->pstate;
172 	spsr &= ~DBG_SPSR_SS;
173 	spsr |= DBG_SPSR_SS;
174 	regs->pstate = spsr;
175 }
176 
clear_regs_spsr_ss(struct pt_regs * regs)177 static void clear_regs_spsr_ss(struct pt_regs *regs)
178 {
179 	unsigned long spsr;
180 
181 	spsr = regs->pstate;
182 	spsr &= ~DBG_SPSR_SS;
183 	regs->pstate = spsr;
184 }
185 
186 /* EL1 Single Step Handler hooks */
187 static LIST_HEAD(step_hook);
188 static DEFINE_RWLOCK(step_hook_lock);
189 
register_step_hook(struct step_hook * hook)190 void register_step_hook(struct step_hook *hook)
191 {
192 	write_lock(&step_hook_lock);
193 	list_add(&hook->node, &step_hook);
194 	write_unlock(&step_hook_lock);
195 }
196 
unregister_step_hook(struct step_hook * hook)197 void unregister_step_hook(struct step_hook *hook)
198 {
199 	write_lock(&step_hook_lock);
200 	list_del(&hook->node);
201 	write_unlock(&step_hook_lock);
202 }
203 
204 /*
205  * Call registered single step handers
206  * There is no Syndrome info to check for determining the handler.
207  * So we call all the registered handlers, until the right handler is
208  * found which returns zero.
209  */
call_step_hook(struct pt_regs * regs,unsigned int esr)210 static int call_step_hook(struct pt_regs *regs, unsigned int esr)
211 {
212 	struct step_hook *hook;
213 	int retval = DBG_HOOK_ERROR;
214 
215 	read_lock(&step_hook_lock);
216 
217 	list_for_each_entry(hook, &step_hook, node)	{
218 		retval = hook->fn(regs, esr);
219 		if (retval == DBG_HOOK_HANDLED)
220 			break;
221 	}
222 
223 	read_unlock(&step_hook_lock);
224 
225 	return retval;
226 }
227 
single_step_handler(unsigned long addr,unsigned int esr,struct pt_regs * regs)228 static int single_step_handler(unsigned long addr, unsigned int esr,
229 			       struct pt_regs *regs)
230 {
231 	siginfo_t info;
232 
233 	/*
234 	 * If we are stepping a pending breakpoint, call the hw_breakpoint
235 	 * handler first.
236 	 */
237 	if (!reinstall_suspended_bps(regs))
238 		return 0;
239 
240 	if (user_mode(regs)) {
241 		info.si_signo = SIGTRAP;
242 		info.si_errno = 0;
243 		info.si_code  = TRAP_HWBKPT;
244 		info.si_addr  = (void __user *)instruction_pointer(regs);
245 		force_sig_info(SIGTRAP, &info, current);
246 
247 		/*
248 		 * ptrace will disable single step unless explicitly
249 		 * asked to re-enable it. For other clients, it makes
250 		 * sense to leave it enabled (i.e. rewind the controls
251 		 * to the active-not-pending state).
252 		 */
253 		user_rewind_single_step(current);
254 	} else {
255 		if (call_step_hook(regs, esr) == DBG_HOOK_HANDLED)
256 			return 0;
257 
258 		pr_warning("Unexpected kernel single-step exception at EL1\n");
259 		/*
260 		 * Re-enable stepping since we know that we will be
261 		 * returning to regs.
262 		 */
263 		set_regs_spsr_ss(regs);
264 	}
265 
266 	return 0;
267 }
268 
269 /*
270  * Breakpoint handler is re-entrant as another breakpoint can
271  * hit within breakpoint handler, especically in kprobes.
272  * Use reader/writer locks instead of plain spinlock.
273  */
274 static LIST_HEAD(break_hook);
275 static DEFINE_RWLOCK(break_hook_lock);
276 
register_break_hook(struct break_hook * hook)277 void register_break_hook(struct break_hook *hook)
278 {
279 	write_lock(&break_hook_lock);
280 	list_add(&hook->node, &break_hook);
281 	write_unlock(&break_hook_lock);
282 }
283 
unregister_break_hook(struct break_hook * hook)284 void unregister_break_hook(struct break_hook *hook)
285 {
286 	write_lock(&break_hook_lock);
287 	list_del(&hook->node);
288 	write_unlock(&break_hook_lock);
289 }
290 
call_break_hook(struct pt_regs * regs,unsigned int esr)291 static int call_break_hook(struct pt_regs *regs, unsigned int esr)
292 {
293 	struct break_hook *hook;
294 	int (*fn)(struct pt_regs *regs, unsigned int esr) = NULL;
295 
296 	read_lock(&break_hook_lock);
297 	list_for_each_entry(hook, &break_hook, node)
298 		if ((esr & hook->esr_mask) == hook->esr_val)
299 			fn = hook->fn;
300 	read_unlock(&break_hook_lock);
301 
302 	return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
303 }
304 
brk_handler(unsigned long addr,unsigned int esr,struct pt_regs * regs)305 static int brk_handler(unsigned long addr, unsigned int esr,
306 		       struct pt_regs *regs)
307 {
308 	siginfo_t info;
309 
310 	if (user_mode(regs)) {
311 		info = (siginfo_t) {
312 			.si_signo = SIGTRAP,
313 			.si_errno = 0,
314 			.si_code  = TRAP_BRKPT,
315 			.si_addr  = (void __user *)instruction_pointer(regs),
316 		};
317 
318 		force_sig_info(SIGTRAP, &info, current);
319 	} else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
320 		pr_warning("Unexpected kernel BRK exception at EL1\n");
321 		return -EFAULT;
322 	}
323 
324 	return 0;
325 }
326 
aarch32_break_handler(struct pt_regs * regs)327 int aarch32_break_handler(struct pt_regs *regs)
328 {
329 	siginfo_t info;
330 	u32 arm_instr;
331 	u16 thumb_instr;
332 	bool bp = false;
333 	void __user *pc = (void __user *)instruction_pointer(regs);
334 
335 	if (!compat_user_mode(regs))
336 		return -EFAULT;
337 
338 	if (compat_thumb_mode(regs)) {
339 		/* get 16-bit Thumb instruction */
340 		get_user(thumb_instr, (u16 __user *)pc);
341 		thumb_instr = le16_to_cpu(thumb_instr);
342 		if (thumb_instr == AARCH32_BREAK_THUMB2_LO) {
343 			/* get second half of 32-bit Thumb-2 instruction */
344 			get_user(thumb_instr, (u16 __user *)(pc + 2));
345 			thumb_instr = le16_to_cpu(thumb_instr);
346 			bp = thumb_instr == AARCH32_BREAK_THUMB2_HI;
347 		} else {
348 			bp = thumb_instr == AARCH32_BREAK_THUMB;
349 		}
350 	} else {
351 		/* 32-bit ARM instruction */
352 		get_user(arm_instr, (u32 __user *)pc);
353 		arm_instr = le32_to_cpu(arm_instr);
354 		bp = (arm_instr & ~0xf0000000) == AARCH32_BREAK_ARM;
355 	}
356 
357 	if (!bp)
358 		return -EFAULT;
359 
360 	info = (siginfo_t) {
361 		.si_signo = SIGTRAP,
362 		.si_errno = 0,
363 		.si_code  = TRAP_BRKPT,
364 		.si_addr  = pc,
365 	};
366 
367 	force_sig_info(SIGTRAP, &info, current);
368 	return 0;
369 }
370 
debug_traps_init(void)371 static int __init debug_traps_init(void)
372 {
373 	hook_debug_fault_code(DBG_ESR_EVT_HWSS, single_step_handler, SIGTRAP,
374 			      TRAP_HWBKPT, "single-step handler");
375 	hook_debug_fault_code(DBG_ESR_EVT_BRK, brk_handler, SIGTRAP,
376 			      TRAP_BRKPT, "ptrace BRK handler");
377 	return 0;
378 }
379 arch_initcall(debug_traps_init);
380 
381 /* Re-enable single step for syscall restarting. */
user_rewind_single_step(struct task_struct * task)382 void user_rewind_single_step(struct task_struct *task)
383 {
384 	/*
385 	 * If single step is active for this thread, then set SPSR.SS
386 	 * to 1 to avoid returning to the active-pending state.
387 	 */
388 	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
389 		set_regs_spsr_ss(task_pt_regs(task));
390 }
391 
user_fastforward_single_step(struct task_struct * task)392 void user_fastforward_single_step(struct task_struct *task)
393 {
394 	if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))
395 		clear_regs_spsr_ss(task_pt_regs(task));
396 }
397 
398 /* Kernel API */
kernel_enable_single_step(struct pt_regs * regs)399 void kernel_enable_single_step(struct pt_regs *regs)
400 {
401 	WARN_ON(!irqs_disabled());
402 	set_regs_spsr_ss(regs);
403 	mdscr_write(mdscr_read() | DBG_MDSCR_SS);
404 	enable_debug_monitors(DBG_ACTIVE_EL1);
405 }
406 
kernel_disable_single_step(void)407 void kernel_disable_single_step(void)
408 {
409 	WARN_ON(!irqs_disabled());
410 	mdscr_write(mdscr_read() & ~DBG_MDSCR_SS);
411 	disable_debug_monitors(DBG_ACTIVE_EL1);
412 }
413 
kernel_active_single_step(void)414 int kernel_active_single_step(void)
415 {
416 	WARN_ON(!irqs_disabled());
417 	return mdscr_read() & DBG_MDSCR_SS;
418 }
419 
420 /* ptrace API */
user_enable_single_step(struct task_struct * task)421 void user_enable_single_step(struct task_struct *task)
422 {
423 	set_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
424 	set_regs_spsr_ss(task_pt_regs(task));
425 }
426 
user_disable_single_step(struct task_struct * task)427 void user_disable_single_step(struct task_struct *task)
428 {
429 	clear_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP);
430 }
431