1 /*
2 * MUSB OTG driver defines
3 *
4 * Copyright 2005 Mentor Graphics Corporation
5 * Copyright (C) 2005-2006 by Texas Instruments
6 * Copyright (C) 2006-2007 Nokia Corporation
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
34
35 #ifndef __MUSB_CORE_H__
36 #define __MUSB_CORE_H__
37
38 #include <linux/slab.h>
39 #include <linux/list.h>
40 #include <linux/interrupt.h>
41 #include <linux/errno.h>
42 #include <linux/timer.h>
43 #include <linux/device.h>
44 #include <linux/usb/ch9.h>
45 #include <linux/usb/gadget.h>
46 #include <linux/usb.h>
47 #include <linux/usb/otg.h>
48 #include <linux/usb/musb.h>
49 #include <linux/phy/phy.h>
50 #include <linux/workqueue.h>
51
52 struct musb;
53 struct musb_hw_ep;
54 struct musb_ep;
55
56 /* Helper defines for struct musb->hwvers */
57 #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
58 #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
59 #define MUSB_HWVERS_RC 0x8000
60 #define MUSB_HWVERS_1300 0x52C
61 #define MUSB_HWVERS_1400 0x590
62 #define MUSB_HWVERS_1800 0x720
63 #define MUSB_HWVERS_1900 0x784
64 #define MUSB_HWVERS_2000 0x800
65
66 #include "musb_debug.h"
67 #include "musb_dma.h"
68
69 #include "musb_io.h"
70 #include "musb_regs.h"
71
72 #include "musb_gadget.h"
73 #include <linux/usb/hcd.h>
74 #include "musb_host.h"
75
76 /* NOTE: otg and peripheral-only state machines start at B_IDLE.
77 * OTG or host-only go to A_IDLE when ID is sensed.
78 */
79 #define is_peripheral_active(m) (!(m)->is_host)
80 #define is_host_active(m) ((m)->is_host)
81
82 enum {
83 MUSB_PORT_MODE_HOST = 1,
84 MUSB_PORT_MODE_GADGET,
85 MUSB_PORT_MODE_DUAL_ROLE,
86 };
87
88 /****************************** CONSTANTS ********************************/
89
90 #ifndef MUSB_C_NUM_EPS
91 #define MUSB_C_NUM_EPS ((u8)16)
92 #endif
93
94 #ifndef MUSB_MAX_END0_PACKET
95 #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
96 #endif
97
98 /* host side ep0 states */
99 enum musb_h_ep0_state {
100 MUSB_EP0_IDLE,
101 MUSB_EP0_START, /* expect ack of setup */
102 MUSB_EP0_IN, /* expect IN DATA */
103 MUSB_EP0_OUT, /* expect ack of OUT DATA */
104 MUSB_EP0_STATUS, /* expect ack of STATUS */
105 } __attribute__ ((packed));
106
107 /* peripheral side ep0 states */
108 enum musb_g_ep0_state {
109 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
110 MUSB_EP0_STAGE_SETUP, /* received SETUP */
111 MUSB_EP0_STAGE_TX, /* IN data */
112 MUSB_EP0_STAGE_RX, /* OUT data */
113 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
114 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
115 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
116 } __attribute__ ((packed));
117
118 /*
119 * OTG protocol constants. See USB OTG 1.3 spec,
120 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
121 */
122 #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
123 #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
124 #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
125 #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
126
127
128 /*************************** REGISTER ACCESS ********************************/
129
130 /* Endpoint registers (other than dynfifo setup) can be accessed either
131 * directly with the "flat" model, or after setting up an index register.
132 */
133
134 #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
135 || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
136 || defined(CONFIG_ARCH_OMAP4)
137 /* REVISIT indexed access seemed to
138 * misbehave (on DaVinci) for at least peripheral IN ...
139 */
140 #define MUSB_FLAT_REG
141 #endif
142
143 /* TUSB mapping: "flat" plus ep0 special cases */
144 #if defined(CONFIG_USB_MUSB_TUSB6010) || \
145 defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
146 #define musb_ep_select(_mbase, _epnum) \
147 musb_writeb((_mbase), MUSB_INDEX, (_epnum))
148 #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
149
150 /* "flat" mapping: each endpoint has its own i/o address */
151 #elif defined(MUSB_FLAT_REG)
152 #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
153 #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
154
155 /* "indexed" mapping: INDEX register controls register bank select */
156 #else
157 #define musb_ep_select(_mbase, _epnum) \
158 musb_writeb((_mbase), MUSB_INDEX, (_epnum))
159 #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
160 #endif
161
162 /****************************** FUNCTIONS ********************************/
163
164 #define MUSB_HST_MODE(_musb)\
165 { (_musb)->is_host = true; }
166 #define MUSB_DEV_MODE(_musb) \
167 { (_musb)->is_host = false; }
168
169 #define test_devctl_hst_mode(_x) \
170 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
171
172 #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
173
174 /******************************** TYPES *************************************/
175
176 /**
177 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
178 * @init: turns on clocks, sets up platform-specific registers, etc
179 * @exit: undoes @init
180 * @set_mode: forcefully changes operating mode
181 * @try_ilde: tries to idle the IP
182 * @vbus_status: returns vbus status if possible
183 * @set_vbus: forces vbus status
184 * @adjust_channel_params: pre check for standard dma channel_program func
185 */
186 struct musb_platform_ops {
187 int (*init)(struct musb *musb);
188 int (*exit)(struct musb *musb);
189
190 void (*enable)(struct musb *musb);
191 void (*disable)(struct musb *musb);
192
193 int (*set_mode)(struct musb *musb, u8 mode);
194 void (*try_idle)(struct musb *musb, unsigned long timeout);
195 int (*reset)(struct musb *musb);
196
197 int (*vbus_status)(struct musb *musb);
198 void (*set_vbus)(struct musb *musb, int on);
199
200 int (*adjust_channel_params)(struct dma_channel *channel,
201 u16 packet_sz, u8 *mode,
202 dma_addr_t *dma_addr, u32 *len);
203 };
204
205 /*
206 * struct musb_hw_ep - endpoint hardware (bidirectional)
207 *
208 * Ordered slightly for better cacheline locality.
209 */
210 struct musb_hw_ep {
211 struct musb *musb;
212 void __iomem *fifo;
213 void __iomem *regs;
214
215 #if defined(CONFIG_USB_MUSB_TUSB6010) || \
216 defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
217 void __iomem *conf;
218 #endif
219
220 /* index in musb->endpoints[] */
221 u8 epnum;
222
223 /* hardware configuration, possibly dynamic */
224 bool is_shared_fifo;
225 bool tx_double_buffered;
226 bool rx_double_buffered;
227 u16 max_packet_sz_tx;
228 u16 max_packet_sz_rx;
229
230 struct dma_channel *tx_channel;
231 struct dma_channel *rx_channel;
232
233 #if defined(CONFIG_USB_MUSB_TUSB6010) || \
234 defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
235 /* TUSB has "asynchronous" and "synchronous" dma modes */
236 dma_addr_t fifo_async;
237 dma_addr_t fifo_sync;
238 void __iomem *fifo_sync_va;
239 #endif
240
241 void __iomem *target_regs;
242
243 /* currently scheduled peripheral endpoint */
244 struct musb_qh *in_qh;
245 struct musb_qh *out_qh;
246
247 u8 rx_reinit;
248 u8 tx_reinit;
249
250 /* peripheral side */
251 struct musb_ep ep_in; /* TX */
252 struct musb_ep ep_out; /* RX */
253 };
254
next_in_request(struct musb_hw_ep * hw_ep)255 static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
256 {
257 return next_request(&hw_ep->ep_in);
258 }
259
next_out_request(struct musb_hw_ep * hw_ep)260 static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
261 {
262 return next_request(&hw_ep->ep_out);
263 }
264
265 struct musb_csr_regs {
266 /* FIFO registers */
267 u16 txmaxp, txcsr, rxmaxp, rxcsr;
268 u16 rxfifoadd, txfifoadd;
269 u8 txtype, txinterval, rxtype, rxinterval;
270 u8 rxfifosz, txfifosz;
271 u8 txfunaddr, txhubaddr, txhubport;
272 u8 rxfunaddr, rxhubaddr, rxhubport;
273 };
274
275 struct musb_context_registers {
276
277 u8 power;
278 u8 intrusbe;
279 u16 frame;
280 u8 index, testmode;
281
282 u8 devctl, busctl, misc;
283 u32 otg_interfsel;
284
285 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
286 };
287
288 /*
289 * struct musb - Driver instance data.
290 */
291 struct musb {
292 /* device lock */
293 spinlock_t lock;
294
295 const struct musb_platform_ops *ops;
296 struct musb_context_registers context;
297
298 irqreturn_t (*isr)(int, void *);
299 struct work_struct irq_work;
300 struct delayed_work recover_work;
301 struct delayed_work deassert_reset_work;
302 struct delayed_work finish_resume_work;
303 u16 hwvers;
304
305 u16 intrrxe;
306 u16 intrtxe;
307 /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
308 #define MUSB_PORT_STAT_RESUME (1 << 31)
309
310 u32 port1_status;
311
312 unsigned long rh_timer;
313
314 enum musb_h_ep0_state ep0_stage;
315
316 /* bulk traffic normally dedicates endpoint hardware, and each
317 * direction has its own ring of host side endpoints.
318 * we try to progress the transfer at the head of each endpoint's
319 * queue until it completes or NAKs too much; then we try the next
320 * endpoint.
321 */
322 struct musb_hw_ep *bulk_ep;
323
324 struct list_head control; /* of musb_qh */
325 struct list_head in_bulk; /* of musb_qh */
326 struct list_head out_bulk; /* of musb_qh */
327
328 struct timer_list otg_timer;
329 struct notifier_block nb;
330
331 struct dma_controller *dma_controller;
332
333 struct device *controller;
334 void __iomem *ctrl_base;
335 void __iomem *mregs;
336
337 #if defined(CONFIG_USB_MUSB_TUSB6010) || \
338 defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
339 dma_addr_t async;
340 dma_addr_t sync;
341 void __iomem *sync_va;
342 u8 tusb_revision;
343 #endif
344
345 /* passed down from chip/board specific irq handlers */
346 u8 int_usb;
347 u16 int_rx;
348 u16 int_tx;
349
350 struct usb_phy *xceiv;
351 struct phy *phy;
352
353 int nIrq;
354 unsigned irq_wake:1;
355
356 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
357 #define control_ep endpoints
358
359 #define VBUSERR_RETRY_COUNT 3
360 u16 vbuserr_retry;
361 u16 epmask;
362 u8 nr_endpoints;
363
364 int (*board_set_power)(int state);
365
366 u8 min_power; /* vbus for periph, in mA/2 */
367
368 int port_mode; /* MUSB_PORT_MODE_* */
369 bool is_host;
370
371 int a_wait_bcon; /* VBUS timeout in msecs */
372 unsigned long idle_timeout; /* Next timeout in jiffies */
373
374 /* active means connected and not suspended */
375 unsigned is_active:1;
376
377 unsigned is_multipoint:1;
378
379 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
380 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
381 unsigned dyn_fifo:1; /* dynamic FIFO supported? */
382
383 unsigned bulk_split:1;
384 #define can_bulk_split(musb,type) \
385 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
386
387 unsigned bulk_combine:1;
388 #define can_bulk_combine(musb,type) \
389 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
390
391 /* is_suspended means USB B_PERIPHERAL suspend */
392 unsigned is_suspended:1;
393
394 /* may_wakeup means remote wakeup is enabled */
395 unsigned may_wakeup:1;
396
397 /* is_self_powered is reported in device status and the
398 * config descriptor. is_bus_powered means B_PERIPHERAL
399 * draws some VBUS current; both can be true.
400 */
401 unsigned is_self_powered:1;
402 unsigned is_bus_powered:1;
403
404 unsigned set_address:1;
405 unsigned test_mode:1;
406 unsigned softconnect:1;
407
408 u8 address;
409 u8 test_mode_nr;
410 u16 ackpend; /* ep0 */
411 enum musb_g_ep0_state ep0_state;
412 struct usb_gadget g; /* the gadget */
413 struct usb_gadget_driver *gadget_driver; /* its driver */
414 struct usb_hcd *hcd; /* the usb hcd */
415
416 /*
417 * FIXME: Remove this flag.
418 *
419 * This is only added to allow Blackfin to work
420 * with current driver. For some unknown reason
421 * Blackfin doesn't work with double buffering
422 * and that's enabled by default.
423 *
424 * We added this flag to forcefully disable double
425 * buffering until we get it working.
426 */
427 unsigned double_buffer_not_ok:1;
428
429 struct musb_hdrc_config *config;
430
431 int xceiv_old_state;
432 #ifdef CONFIG_DEBUG_FS
433 struct dentry *debugfs_root;
434 #endif
435 };
436
gadget_to_musb(struct usb_gadget * g)437 static inline struct musb *gadget_to_musb(struct usb_gadget *g)
438 {
439 return container_of(g, struct musb, g);
440 }
441
442 #ifdef CONFIG_BLACKFIN
musb_read_fifosize(struct musb * musb,struct musb_hw_ep * hw_ep,u8 epnum)443 static inline int musb_read_fifosize(struct musb *musb,
444 struct musb_hw_ep *hw_ep, u8 epnum)
445 {
446 musb->nr_endpoints++;
447 musb->epmask |= (1 << epnum);
448
449 if (epnum < 5) {
450 hw_ep->max_packet_sz_tx = 128;
451 hw_ep->max_packet_sz_rx = 128;
452 } else {
453 hw_ep->max_packet_sz_tx = 1024;
454 hw_ep->max_packet_sz_rx = 1024;
455 }
456 hw_ep->is_shared_fifo = false;
457
458 return 0;
459 }
460
musb_configure_ep0(struct musb * musb)461 static inline void musb_configure_ep0(struct musb *musb)
462 {
463 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
464 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
465 musb->endpoints[0].is_shared_fifo = true;
466 }
467
468 #else
469
musb_read_fifosize(struct musb * musb,struct musb_hw_ep * hw_ep,u8 epnum)470 static inline int musb_read_fifosize(struct musb *musb,
471 struct musb_hw_ep *hw_ep, u8 epnum)
472 {
473 void __iomem *mbase = musb->mregs;
474 u8 reg = 0;
475
476 /* read from core using indexed model */
477 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
478 /* 0's returned when no more endpoints */
479 if (!reg)
480 return -ENODEV;
481
482 musb->nr_endpoints++;
483 musb->epmask |= (1 << epnum);
484
485 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
486
487 /* shared TX/RX FIFO? */
488 if ((reg & 0xf0) == 0xf0) {
489 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
490 hw_ep->is_shared_fifo = true;
491 return 0;
492 } else {
493 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
494 hw_ep->is_shared_fifo = false;
495 }
496
497 return 0;
498 }
499
musb_configure_ep0(struct musb * musb)500 static inline void musb_configure_ep0(struct musb *musb)
501 {
502 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
503 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
504 musb->endpoints[0].is_shared_fifo = true;
505 }
506 #endif /* CONFIG_BLACKFIN */
507
508
509 /***************************** Glue it together *****************************/
510
511 extern const char musb_driver_name[];
512
513 extern void musb_stop(struct musb *musb);
514 extern void musb_start(struct musb *musb);
515
516 extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
517 extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
518
519 extern void musb_load_testpacket(struct musb *);
520
521 extern irqreturn_t musb_interrupt(struct musb *);
522
523 extern void musb_hnp_stop(struct musb *musb);
524
musb_platform_set_vbus(struct musb * musb,int is_on)525 static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
526 {
527 if (musb->ops->set_vbus)
528 musb->ops->set_vbus(musb, is_on);
529 }
530
musb_platform_enable(struct musb * musb)531 static inline void musb_platform_enable(struct musb *musb)
532 {
533 if (musb->ops->enable)
534 musb->ops->enable(musb);
535 }
536
musb_platform_disable(struct musb * musb)537 static inline void musb_platform_disable(struct musb *musb)
538 {
539 if (musb->ops->disable)
540 musb->ops->disable(musb);
541 }
542
musb_platform_set_mode(struct musb * musb,u8 mode)543 static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
544 {
545 if (!musb->ops->set_mode)
546 return 0;
547
548 return musb->ops->set_mode(musb, mode);
549 }
550
musb_platform_try_idle(struct musb * musb,unsigned long timeout)551 static inline void musb_platform_try_idle(struct musb *musb,
552 unsigned long timeout)
553 {
554 if (musb->ops->try_idle)
555 musb->ops->try_idle(musb, timeout);
556 }
557
musb_platform_reset(struct musb * musb)558 static inline int musb_platform_reset(struct musb *musb)
559 {
560 if (!musb->ops->reset)
561 return -EINVAL;
562
563 return musb->ops->reset(musb);
564 }
565
musb_platform_get_vbus_status(struct musb * musb)566 static inline int musb_platform_get_vbus_status(struct musb *musb)
567 {
568 if (!musb->ops->vbus_status)
569 return 0;
570
571 return musb->ops->vbus_status(musb);
572 }
573
musb_platform_init(struct musb * musb)574 static inline int musb_platform_init(struct musb *musb)
575 {
576 if (!musb->ops->init)
577 return -EINVAL;
578
579 return musb->ops->init(musb);
580 }
581
musb_platform_exit(struct musb * musb)582 static inline int musb_platform_exit(struct musb *musb)
583 {
584 if (!musb->ops->exit)
585 return -EINVAL;
586
587 return musb->ops->exit(musb);
588 }
589
590 #endif /* __MUSB_CORE_H__ */
591