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1 #ifndef _ASM_POWERPC_PGTABLE_PPC64_H_
2 #define _ASM_POWERPC_PGTABLE_PPC64_H_
3 /*
4  * This file contains the functions and defines necessary to modify and use
5  * the ppc64 hashed page table.
6  */
7 
8 #ifdef CONFIG_PPC_64K_PAGES
9 #include <asm/pgtable-ppc64-64k.h>
10 #else
11 #include <asm/pgtable-ppc64-4k.h>
12 #endif
13 #include <asm/barrier.h>
14 
15 #define FIRST_USER_ADDRESS	0
16 
17 /*
18  * Size of EA range mapped by our pagetables.
19  */
20 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
21                 	    PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
22 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
23 
24 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
25 #define PMD_CACHE_INDEX	(PMD_INDEX_SIZE + 1)
26 #else
27 #define PMD_CACHE_INDEX	PMD_INDEX_SIZE
28 #endif
29 /*
30  * Define the address range of the kernel non-linear virtual area
31  */
32 
33 #ifdef CONFIG_PPC_BOOK3E
34 #define KERN_VIRT_START ASM_CONST(0x8000000000000000)
35 #else
36 #define KERN_VIRT_START ASM_CONST(0xD000000000000000)
37 #endif
38 #define KERN_VIRT_SIZE	ASM_CONST(0x0000100000000000)
39 
40 /*
41  * The vmalloc space starts at the beginning of that region, and
42  * occupies half of it on hash CPUs and a quarter of it on Book3E
43  * (we keep a quarter for the virtual memmap)
44  */
45 #define VMALLOC_START	KERN_VIRT_START
46 #ifdef CONFIG_PPC_BOOK3E
47 #define VMALLOC_SIZE	(KERN_VIRT_SIZE >> 2)
48 #else
49 #define VMALLOC_SIZE	(KERN_VIRT_SIZE >> 1)
50 #endif
51 #define VMALLOC_END	(VMALLOC_START + VMALLOC_SIZE)
52 
53 /*
54  * The second half of the kernel virtual space is used for IO mappings,
55  * it's itself carved into the PIO region (ISA and PHB IO space) and
56  * the ioremap space
57  *
58  *  ISA_IO_BASE = KERN_IO_START, 64K reserved area
59  *  PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
60  * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
61  */
62 #define KERN_IO_START	(KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
63 #define FULL_IO_SIZE	0x80000000ul
64 #define  ISA_IO_BASE	(KERN_IO_START)
65 #define  ISA_IO_END	(KERN_IO_START + 0x10000ul)
66 #define  PHB_IO_BASE	(ISA_IO_END)
67 #define  PHB_IO_END	(KERN_IO_START + FULL_IO_SIZE)
68 #define IOREMAP_BASE	(PHB_IO_END)
69 #define IOREMAP_END	(KERN_VIRT_START + KERN_VIRT_SIZE)
70 
71 
72 /*
73  * Region IDs
74  */
75 #define REGION_SHIFT		60UL
76 #define REGION_MASK		(0xfUL << REGION_SHIFT)
77 #define REGION_ID(ea)		(((unsigned long)(ea)) >> REGION_SHIFT)
78 
79 #define VMALLOC_REGION_ID	(REGION_ID(VMALLOC_START))
80 #define KERNEL_REGION_ID	(REGION_ID(PAGE_OFFSET))
81 #define VMEMMAP_REGION_ID	(0xfUL)	/* Server only */
82 #define USER_REGION_ID		(0UL)
83 
84 /*
85  * Defines the address of the vmemap area, in its own region on
86  * hash table CPUs and after the vmalloc space on Book3E
87  */
88 #ifdef CONFIG_PPC_BOOK3E
89 #define VMEMMAP_BASE		VMALLOC_END
90 #define VMEMMAP_END		KERN_IO_START
91 #else
92 #define VMEMMAP_BASE		(VMEMMAP_REGION_ID << REGION_SHIFT)
93 #endif
94 #define vmemmap			((struct page *)VMEMMAP_BASE)
95 
96 
97 /*
98  * Include the PTE bits definitions
99  */
100 #ifdef CONFIG_PPC_BOOK3S
101 #include <asm/pte-hash64.h>
102 #else
103 #include <asm/pte-book3e.h>
104 #endif
105 #include <asm/pte-common.h>
106 
107 #ifdef CONFIG_PPC_MM_SLICES
108 #define HAVE_ARCH_UNMAPPED_AREA
109 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
110 #endif /* CONFIG_PPC_MM_SLICES */
111 
112 #ifndef __ASSEMBLY__
113 
114 /*
115  * This is the default implementation of various PTE accessors, it's
116  * used in all cases except Book3S with 64K pages where we have a
117  * concept of sub-pages
118  */
119 #ifndef __real_pte
120 
121 #ifdef STRICT_MM_TYPECHECKS
122 #define __real_pte(e,p)		((real_pte_t){(e)})
123 #define __rpte_to_pte(r)	((r).pte)
124 #else
125 #define __real_pte(e,p)		(e)
126 #define __rpte_to_pte(r)	(__pte(r))
127 #endif
128 #define __rpte_to_hidx(r,index)	(pte_val(__rpte_to_pte(r)) >> 12)
129 
130 #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift)       \
131 	do {							         \
132 		index = 0;					         \
133 		shift = mmu_psize_defs[psize].shift;		         \
134 
135 #define pte_iterate_hashed_end() } while(0)
136 
137 #ifdef CONFIG_PPC_HAS_HASH_64K
138 /*
139  * We expect this to be called only for user addresses or kernel virtual
140  * addresses other than the linear mapping.
141  */
142 #define pte_pagesize_index(mm, addr, pte)			\
143 	({							\
144 		unsigned int psize;				\
145 		if (is_kernel_addr(addr))			\
146 			psize = MMU_PAGE_4K;			\
147 		else						\
148 			psize = get_slice_psize(mm, addr);	\
149 		psize;						\
150 	})
151 #else
152 #define pte_pagesize_index(mm, addr, pte)	MMU_PAGE_4K
153 #endif
154 
155 #endif /* __real_pte */
156 
157 
158 /* pte_clear moved to later in this file */
159 
160 #define PMD_BAD_BITS		(PTE_TABLE_SIZE-1)
161 #define PUD_BAD_BITS		(PMD_TABLE_SIZE-1)
162 
163 #define pmd_set(pmdp, pmdval) 	(pmd_val(*(pmdp)) = (pmdval))
164 #define pmd_none(pmd)		(!pmd_val(pmd))
165 #define	pmd_bad(pmd)		(!is_kernel_addr(pmd_val(pmd)) \
166 				 || (pmd_val(pmd) & PMD_BAD_BITS))
167 #define	pmd_present(pmd)	(pmd_val(pmd) != 0)
168 #define	pmd_clear(pmdp)		(pmd_val(*(pmdp)) = 0)
169 #define pmd_page_vaddr(pmd)	(pmd_val(pmd) & ~PMD_MASKED_BITS)
170 extern struct page *pmd_page(pmd_t pmd);
171 
172 #define pud_set(pudp, pudval)	(pud_val(*(pudp)) = (pudval))
173 #define pud_none(pud)		(!pud_val(pud))
174 #define	pud_bad(pud)		(!is_kernel_addr(pud_val(pud)) \
175 				 || (pud_val(pud) & PUD_BAD_BITS))
176 #define pud_present(pud)	(pud_val(pud) != 0)
177 #define pud_clear(pudp)		(pud_val(*(pudp)) = 0)
178 #define pud_page_vaddr(pud)	(pud_val(pud) & ~PUD_MASKED_BITS)
179 #define pud_page(pud)		virt_to_page(pud_page_vaddr(pud))
180 
181 #define pgd_set(pgdp, pudp)	({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
182 
183 /*
184  * Find an entry in a page-table-directory.  We combine the address region
185  * (the high order N bits) and the pgd portion of the address.
186  */
187 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & (PTRS_PER_PGD - 1))
188 
189 #define pgd_offset(mm, address)	 ((mm)->pgd + pgd_index(address))
190 
191 #define pmd_offset(pudp,addr) \
192   (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
193 
194 #define pte_offset_kernel(dir,addr) \
195   (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
196 
197 #define pte_offset_map(dir,addr)	pte_offset_kernel((dir), (addr))
198 #define pte_unmap(pte)			do { } while(0)
199 
200 /* to find an entry in a kernel page-table-directory */
201 /* This now only contains the vmalloc pages */
202 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
203 extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
204 			    pte_t *ptep, unsigned long pte, int huge);
205 
206 /* Atomic PTE updates */
pte_update(struct mm_struct * mm,unsigned long addr,pte_t * ptep,unsigned long clr,unsigned long set,int huge)207 static inline unsigned long pte_update(struct mm_struct *mm,
208 				       unsigned long addr,
209 				       pte_t *ptep, unsigned long clr,
210 				       unsigned long set,
211 				       int huge)
212 {
213 #ifdef PTE_ATOMIC_UPDATES
214 	unsigned long old, tmp;
215 
216 	__asm__ __volatile__(
217 	"1:	ldarx	%0,0,%3		# pte_update\n\
218 	andi.	%1,%0,%6\n\
219 	bne-	1b \n\
220 	andc	%1,%0,%4 \n\
221 	or	%1,%1,%7\n\
222 	stdcx.	%1,0,%3 \n\
223 	bne-	1b"
224 	: "=&r" (old), "=&r" (tmp), "=m" (*ptep)
225 	: "r" (ptep), "r" (clr), "m" (*ptep), "i" (_PAGE_BUSY), "r" (set)
226 	: "cc" );
227 #else
228 	unsigned long old = pte_val(*ptep);
229 	*ptep = __pte((old & ~clr) | set);
230 #endif
231 	/* huge pages use the old page table lock */
232 	if (!huge)
233 		assert_pte_locked(mm, addr);
234 
235 #ifdef CONFIG_PPC_STD_MMU_64
236 	if (old & _PAGE_HASHPTE)
237 		hpte_need_flush(mm, addr, ptep, old, huge);
238 #endif
239 
240 	return old;
241 }
242 
__ptep_test_and_clear_young(struct mm_struct * mm,unsigned long addr,pte_t * ptep)243 static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
244 					      unsigned long addr, pte_t *ptep)
245 {
246 	unsigned long old;
247 
248 	if ((pte_val(*ptep) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
249 		return 0;
250 	old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
251 	return (old & _PAGE_ACCESSED) != 0;
252 }
253 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
254 #define ptep_test_and_clear_young(__vma, __addr, __ptep)		   \
255 ({									   \
256 	int __r;							   \
257 	__r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
258 	__r;								   \
259 })
260 
261 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
ptep_set_wrprotect(struct mm_struct * mm,unsigned long addr,pte_t * ptep)262 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
263 				      pte_t *ptep)
264 {
265 
266 	if ((pte_val(*ptep) & _PAGE_RW) == 0)
267 		return;
268 
269 	pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
270 }
271 
huge_ptep_set_wrprotect(struct mm_struct * mm,unsigned long addr,pte_t * ptep)272 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
273 					   unsigned long addr, pte_t *ptep)
274 {
275 	if ((pte_val(*ptep) & _PAGE_RW) == 0)
276 		return;
277 
278 	pte_update(mm, addr, ptep, _PAGE_RW, 0, 1);
279 }
280 
281 /*
282  * We currently remove entries from the hashtable regardless of whether
283  * the entry was young or dirty. The generic routines only flush if the
284  * entry was young or dirty which is not good enough.
285  *
286  * We should be more intelligent about this but for the moment we override
287  * these functions and force a tlb flush unconditionally
288  */
289 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
290 #define ptep_clear_flush_young(__vma, __address, __ptep)		\
291 ({									\
292 	int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
293 						  __ptep);		\
294 	__young;							\
295 })
296 
297 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
ptep_get_and_clear(struct mm_struct * mm,unsigned long addr,pte_t * ptep)298 static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
299 				       unsigned long addr, pte_t *ptep)
300 {
301 	unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
302 	return __pte(old);
303 }
304 
pte_clear(struct mm_struct * mm,unsigned long addr,pte_t * ptep)305 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
306 			     pte_t * ptep)
307 {
308 	pte_update(mm, addr, ptep, ~0UL, 0, 0);
309 }
310 
311 
312 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
313  * function doesn't need to flush the hash entry
314  */
__ptep_set_access_flags(pte_t * ptep,pte_t entry)315 static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
316 {
317 	unsigned long bits = pte_val(entry) &
318 		(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
319 
320 #ifdef PTE_ATOMIC_UPDATES
321 	unsigned long old, tmp;
322 
323 	__asm__ __volatile__(
324 	"1:	ldarx	%0,0,%4\n\
325 		andi.	%1,%0,%6\n\
326 		bne-	1b \n\
327 		or	%0,%3,%0\n\
328 		stdcx.	%0,0,%4\n\
329 		bne-	1b"
330 	:"=&r" (old), "=&r" (tmp), "=m" (*ptep)
331 	:"r" (bits), "r" (ptep), "m" (*ptep), "i" (_PAGE_BUSY)
332 	:"cc");
333 #else
334 	unsigned long old = pte_val(*ptep);
335 	*ptep = __pte(old | bits);
336 #endif
337 }
338 
339 #define __HAVE_ARCH_PTE_SAME
340 #define pte_same(A,B)	(((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
341 
342 #define pte_ERROR(e) \
343 	pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
344 #define pmd_ERROR(e) \
345 	pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
346 #define pgd_ERROR(e) \
347 	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
348 
349 /* Encode and de-code a swap entry */
350 #define __swp_type(entry)	(((entry).val >> 1) & 0x3f)
351 #define __swp_offset(entry)	((entry).val >> 8)
352 #define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)})
353 #define __pte_to_swp_entry(pte)	((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT})
354 #define __swp_entry_to_pte(x)	((pte_t) { (x).val << PTE_RPN_SHIFT })
355 #define pte_to_pgoff(pte)	(pte_val(pte) >> PTE_RPN_SHIFT)
356 #define pgoff_to_pte(off)	((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
357 #define PTE_FILE_MAX_BITS	(BITS_PER_LONG - PTE_RPN_SHIFT)
358 
359 void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
360 void pgtable_cache_init(void);
361 #endif /* __ASSEMBLY__ */
362 
363 /*
364  * THP pages can't be special. So use the _PAGE_SPECIAL
365  */
366 #define _PAGE_SPLITTING _PAGE_SPECIAL
367 
368 /*
369  * We need to differentiate between explicit huge page and THP huge
370  * page, since THP huge page also need to track real subpage details
371  */
372 #define _PAGE_THP_HUGE  _PAGE_4K_PFN
373 
374 /*
375  * set of bits not changed in pmd_modify.
376  */
377 #define _HPAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS |		\
378 			 _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPLITTING | \
379 			 _PAGE_THP_HUGE)
380 
381 #ifndef __ASSEMBLY__
382 /*
383  * The linux hugepage PMD now include the pmd entries followed by the address
384  * to the stashed pgtable_t. The stashed pgtable_t contains the hpte bits.
385  * [ 1 bit secondary | 3 bit hidx | 1 bit valid | 000]. We use one byte per
386  * each HPTE entry. With 16MB hugepage and 64K HPTE we need 256 entries and
387  * with 4K HPTE we need 4096 entries. Both will fit in a 4K pgtable_t.
388  *
389  * The last three bits are intentionally left to zero. This memory location
390  * are also used as normal page PTE pointers. So if we have any pointers
391  * left around while we collapse a hugepage, we need to make sure
392  * _PAGE_PRESENT and _PAGE_FILE bits of that are zero when we look at them
393  */
hpte_valid(unsigned char * hpte_slot_array,int index)394 static inline unsigned int hpte_valid(unsigned char *hpte_slot_array, int index)
395 {
396 	return (hpte_slot_array[index] >> 3) & 0x1;
397 }
398 
hpte_hash_index(unsigned char * hpte_slot_array,int index)399 static inline unsigned int hpte_hash_index(unsigned char *hpte_slot_array,
400 					   int index)
401 {
402 	return hpte_slot_array[index] >> 4;
403 }
404 
mark_hpte_slot_valid(unsigned char * hpte_slot_array,unsigned int index,unsigned int hidx)405 static inline void mark_hpte_slot_valid(unsigned char *hpte_slot_array,
406 					unsigned int index, unsigned int hidx)
407 {
408 	hpte_slot_array[index] = hidx << 4 | 0x1 << 3;
409 }
410 
411 struct page *realmode_pfn_to_page(unsigned long pfn);
412 
get_hpte_slot_array(pmd_t * pmdp)413 static inline char *get_hpte_slot_array(pmd_t *pmdp)
414 {
415 	/*
416 	 * The hpte hindex is stored in the pgtable whose address is in the
417 	 * second half of the PMD
418 	 *
419 	 * Order this load with the test for pmd_trans_huge in the caller
420 	 */
421 	smp_rmb();
422 	return *(char **)(pmdp + PTRS_PER_PMD);
423 
424 
425 }
426 
427 extern void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr,
428 				   pmd_t *pmdp, unsigned long old_pmd);
429 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
430 extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
431 extern pmd_t mk_pmd(struct page *page, pgprot_t pgprot);
432 extern pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot);
433 extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
434 		       pmd_t *pmdp, pmd_t pmd);
435 extern void update_mmu_cache_pmd(struct vm_area_struct *vma, unsigned long addr,
436 				 pmd_t *pmd);
437 
pmd_trans_huge(pmd_t pmd)438 static inline int pmd_trans_huge(pmd_t pmd)
439 {
440 	/*
441 	 * leaf pte for huge page, bottom two bits != 00
442 	 */
443 	return (pmd_val(pmd) & 0x3) && (pmd_val(pmd) & _PAGE_THP_HUGE);
444 }
445 
pmd_large(pmd_t pmd)446 static inline int pmd_large(pmd_t pmd)
447 {
448 	/*
449 	 * leaf pte for huge page, bottom two bits != 00
450 	 */
451 	if (pmd_trans_huge(pmd))
452 		return pmd_val(pmd) & _PAGE_PRESENT;
453 	return 0;
454 }
455 
pmd_trans_splitting(pmd_t pmd)456 static inline int pmd_trans_splitting(pmd_t pmd)
457 {
458 	if (pmd_trans_huge(pmd))
459 		return pmd_val(pmd) & _PAGE_SPLITTING;
460 	return 0;
461 }
462 
463 extern int has_transparent_hugepage(void);
464 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
465 
pmd_pte(pmd_t pmd)466 static inline pte_t pmd_pte(pmd_t pmd)
467 {
468 	return __pte(pmd_val(pmd));
469 }
470 
pte_pmd(pte_t pte)471 static inline pmd_t pte_pmd(pte_t pte)
472 {
473 	return __pmd(pte_val(pte));
474 }
475 
pmdp_ptep(pmd_t * pmd)476 static inline pte_t *pmdp_ptep(pmd_t *pmd)
477 {
478 	return (pte_t *)pmd;
479 }
480 
481 #define pmd_pfn(pmd)		pte_pfn(pmd_pte(pmd))
482 #define pmd_dirty(pmd)		pte_dirty(pmd_pte(pmd))
483 #define pmd_young(pmd)		pte_young(pmd_pte(pmd))
484 #define pmd_mkold(pmd)		pte_pmd(pte_mkold(pmd_pte(pmd)))
485 #define pmd_wrprotect(pmd)	pte_pmd(pte_wrprotect(pmd_pte(pmd)))
486 #define pmd_mkdirty(pmd)	pte_pmd(pte_mkdirty(pmd_pte(pmd)))
487 #define pmd_mkyoung(pmd)	pte_pmd(pte_mkyoung(pmd_pte(pmd)))
488 #define pmd_mkwrite(pmd)	pte_pmd(pte_mkwrite(pmd_pte(pmd)))
489 
490 #define __HAVE_ARCH_PMD_WRITE
491 #define pmd_write(pmd)		pte_write(pmd_pte(pmd))
492 
pmd_mkhuge(pmd_t pmd)493 static inline pmd_t pmd_mkhuge(pmd_t pmd)
494 {
495 	/* Do nothing, mk_pmd() does this part.  */
496 	return pmd;
497 }
498 
pmd_mknotpresent(pmd_t pmd)499 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
500 {
501 	pmd_val(pmd) &= ~_PAGE_PRESENT;
502 	return pmd;
503 }
504 
pmd_mksplitting(pmd_t pmd)505 static inline pmd_t pmd_mksplitting(pmd_t pmd)
506 {
507 	pmd_val(pmd) |= _PAGE_SPLITTING;
508 	return pmd;
509 }
510 
511 #define __HAVE_ARCH_PMD_SAME
pmd_same(pmd_t pmd_a,pmd_t pmd_b)512 static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
513 {
514 	return (((pmd_val(pmd_a) ^ pmd_val(pmd_b)) & ~_PAGE_HPTEFLAGS) == 0);
515 }
516 
517 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
518 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
519 				 unsigned long address, pmd_t *pmdp,
520 				 pmd_t entry, int dirty);
521 
522 extern unsigned long pmd_hugepage_update(struct mm_struct *mm,
523 					 unsigned long addr,
524 					 pmd_t *pmdp,
525 					 unsigned long clr,
526 					 unsigned long set);
527 
__pmdp_test_and_clear_young(struct mm_struct * mm,unsigned long addr,pmd_t * pmdp)528 static inline int __pmdp_test_and_clear_young(struct mm_struct *mm,
529 					      unsigned long addr, pmd_t *pmdp)
530 {
531 	unsigned long old;
532 
533 	if ((pmd_val(*pmdp) & (_PAGE_ACCESSED | _PAGE_HASHPTE)) == 0)
534 		return 0;
535 	old = pmd_hugepage_update(mm, addr, pmdp, _PAGE_ACCESSED, 0);
536 	return ((old & _PAGE_ACCESSED) != 0);
537 }
538 
539 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
540 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
541 				     unsigned long address, pmd_t *pmdp);
542 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
543 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
544 				  unsigned long address, pmd_t *pmdp);
545 
546 #define __HAVE_ARCH_PMDP_GET_AND_CLEAR
547 extern pmd_t pmdp_get_and_clear(struct mm_struct *mm,
548 				unsigned long addr, pmd_t *pmdp);
549 
550 #define __HAVE_ARCH_PMDP_CLEAR_FLUSH
551 extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma, unsigned long address,
552 			      pmd_t *pmdp);
553 
554 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
pmdp_set_wrprotect(struct mm_struct * mm,unsigned long addr,pmd_t * pmdp)555 static inline void pmdp_set_wrprotect(struct mm_struct *mm, unsigned long addr,
556 				      pmd_t *pmdp)
557 {
558 
559 	if ((pmd_val(*pmdp) & _PAGE_RW) == 0)
560 		return;
561 
562 	pmd_hugepage_update(mm, addr, pmdp, _PAGE_RW, 0);
563 }
564 
565 #define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
566 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
567 				 unsigned long address, pmd_t *pmdp);
568 
569 #define __HAVE_ARCH_PGTABLE_DEPOSIT
570 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
571 				       pgtable_t pgtable);
572 #define __HAVE_ARCH_PGTABLE_WITHDRAW
573 extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
574 
575 #define __HAVE_ARCH_PMDP_INVALIDATE
576 extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
577 			    pmd_t *pmdp);
578 
579 #define pmd_move_must_withdraw pmd_move_must_withdraw
580 struct spinlock;
pmd_move_must_withdraw(struct spinlock * new_pmd_ptl,struct spinlock * old_pmd_ptl)581 static inline int pmd_move_must_withdraw(struct spinlock *new_pmd_ptl,
582 					 struct spinlock *old_pmd_ptl)
583 {
584 	/*
585 	 * Archs like ppc64 use pgtable to store per pmd
586 	 * specific information. So when we switch the pmd,
587 	 * we should also withdraw and deposit the pgtable
588 	 */
589 	return true;
590 }
591 
592 #endif /* __ASSEMBLY__ */
593 #endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */
594