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Searched defs:inst (Results 1 – 25 of 200) sorted by relevance

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/arch/powerpc/include/asm/
Ddisassemble.h25 static inline unsigned int get_op(u32 inst) in get_op()
30 static inline unsigned int get_xop(u32 inst) in get_xop()
35 static inline unsigned int get_sprn(u32 inst) in get_sprn()
40 static inline unsigned int get_dcrn(u32 inst) in get_dcrn()
45 static inline unsigned int get_rt(u32 inst) in get_rt()
50 static inline unsigned int get_rs(u32 inst) in get_rs()
55 static inline unsigned int get_ra(u32 inst) in get_ra()
60 static inline unsigned int get_rb(u32 inst) in get_rb()
65 static inline unsigned int get_rc(u32 inst) in get_rc()
70 static inline unsigned int get_ws(u32 inst) in get_ws()
[all …]
/arch/arm/vfp/
Dvfpinstr.h13 #define INST_CPRTDO(inst) (((inst) & 0x0f000000) == 0x0e000000) argument
14 #define INST_CPRT(inst) ((inst) & (1 << 4)) argument
15 #define INST_CPRT_L(inst) ((inst) & (1 << 20)) argument
16 #define INST_CPRT_Rd(inst) (((inst) & (15 << 12)) >> 12) argument
17 #define INST_CPRT_OP(inst) (((inst) >> 21) & 7) argument
18 #define INST_CPNUM(inst) ((inst) & 0xf00) argument
33 #define FOP_TO_IDX(inst) ((inst & 0x00b00000) >> 20 | (inst & (1 << 6)) >> 4) argument
52 #define FEXT_TO_IDX(inst) ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7) argument
54 #define vfp_get_sd(inst) ((inst & 0x0000f000) >> 11 | (inst & (1 << 22)) >> 22) argument
55 #define vfp_get_dd(inst) ((inst & 0x0000f000) >> 12 | (inst & (1 << 22)) >> 18) argument
[all …]
/arch/arm/mach-omap2/
Dcm33xx.c51 static inline u32 am33xx_cm_read_reg(u16 inst, u16 idx) in am33xx_cm_read_reg()
57 static inline void am33xx_cm_write_reg(u32 val, u16 inst, u16 idx) in am33xx_cm_write_reg()
63 static inline u32 am33xx_cm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx) in am33xx_cm_rmw_reg_bits()
75 static inline u32 am33xx_cm_set_reg_bits(u32 bits, s16 inst, s16 idx) in am33xx_cm_set_reg_bits()
80 static inline u32 am33xx_cm_clear_reg_bits(u32 bits, s16 inst, s16 idx) in am33xx_cm_clear_reg_bits()
85 static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16 idx, u32 mask) in am33xx_cm_read_reg_bits()
105 static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs) in _clkctrl_idlest()
122 static bool _is_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs) in _is_module_ready()
141 static void _clktrctrl_write(u8 c, u16 inst, u16 cdoffs) in _clktrctrl_write()
161 bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs) in am33xx_cm_is_clkdm_in_hwsup()
[all …]
Dcm44xx.c28 u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg) in omap4_cm1_read_inst_reg()
34 void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg) in omap4_cm1_write_inst_reg()
40 u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg) in omap4_cm2_read_inst_reg()
46 void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg) in omap4_cm2_write_inst_reg()
Dcminst44xx.c87 static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) in _clkctrl_idlest()
105 static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) in _is_module_ready()
118 u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx) in omap4_cminst_read_inst_reg()
127 void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx) in omap4_cminst_write_inst_reg()
136 u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst, in omap4_cminst_rmw_inst_reg_bits()
149 u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx) in omap4_cminst_set_inst_reg_bits()
154 u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx) in omap4_cminst_clear_inst_reg_bits()
159 u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask) in omap4_cminst_read_inst_reg_bits()
184 static void _clktrctrl_write(u8 c, u8 part, u16 inst, u16 cdoffs) in _clktrctrl_write()
203 bool omap4_cminst_is_clkdm_in_hwsup(u8 part, u16 inst, u16 cdoffs) in omap4_cminst_is_clkdm_in_hwsup()
[all …]
Dprminst44xx.c67 u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx) in omap4_prminst_read_inst_reg()
76 void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) in omap4_prminst_write_inst_reg()
85 u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, in omap4_prminst_rmw_inst_reg_bits()
114 int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, in omap4_prminst_is_hardreset_asserted()
138 int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, in omap4_prminst_assert_hardreset()
163 int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, in omap4_prminst_deassert_hardreset()
192 s32 inst = omap4_prmst_get_prm_dev_inst(); in omap4_prminst_global_warm_sw_reset() local
Dprcm_mpu44xx.c31 u32 omap4_prcm_mpu_read_inst_reg(s16 inst, u16 reg) in omap4_prcm_mpu_read_inst_reg()
36 void omap4_prcm_mpu_write_inst_reg(u32 val, s16 inst, u16 reg) in omap4_prcm_mpu_write_inst_reg()
41 u32 omap4_prcm_mpu_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) in omap4_prcm_mpu_rmw_inst_reg_bits()
Dprm44xx.c83 u32 omap4_prm_read_inst_reg(s16 inst, u16 reg) in omap4_prm_read_inst_reg()
89 void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg) in omap4_prm_write_inst_reg()
95 u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) in omap4_prm_rmw_inst_reg_bits()
157 s32 inst = omap4_prmst_get_prm_dev_inst(); in omap4_prm_vcvp_read() local
168 s32 inst = omap4_prmst_get_prm_dev_inst(); in omap4_prm_vcvp_write() local
179 s32 inst = omap4_prmst_get_prm_dev_inst(); in omap4_prm_vcvp_rmw() local
293 s32 inst = omap4_prmst_get_prm_dev_inst(); in omap44xx_prm_reconfigure_io_chain() local
338 s32 inst = omap4_prmst_get_prm_dev_inst(); in omap44xx_prm_enable_io_wakeup() local
360 s32 inst = omap4_prmst_get_prm_dev_inst(); in omap44xx_prm_read_reset_sources() local
389 static bool omap44xx_prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx) in omap44xx_prm_was_any_context_lost_old()
[all …]
/arch/cris/include/arch-v32/arch/hwregs/iop/
Diop_version_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_scrc_out_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_scrc_in_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_fifo_out_extra_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
Diop_version_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Diop_sap_in_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/arch/cris/include/arch-v32/arch/hwregs/
Dirq_nmi_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dstrcop_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Ddma.h75 #define DMA_ENABLE( inst ) \ argument
81 #define DMA_RESET( inst ) \ argument
87 #define DMA_STOP( inst ) \ argument
93 #define DMA_CONTINUE( inst ) \ argument
99 #define DMA_WR_CMD( inst, cmd_par ) \ argument
107 #define DMA_START_GROUP( inst, group_descr ) \ argument
115 #define DMA_START_CONTEXT( inst, ctx_descr ) \ argument
122 #define DMA_CONTINUE_DATA( inst ) \ argument
Dconfig_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/arch/powerpc/kernel/
Dkvm.c80 static inline void kvm_patch_ins(u32 *inst, u32 new_inst) in kvm_patch_ins()
86 static void kvm_patch_ins_ll(u32 *inst, long addr, u32 rt) in kvm_patch_ins_ll()
95 static void kvm_patch_ins_ld(u32 *inst, long addr, u32 rt) in kvm_patch_ins_ld()
104 static void kvm_patch_ins_lwz(u32 *inst, long addr, u32 rt) in kvm_patch_ins_lwz()
109 static void kvm_patch_ins_std(u32 *inst, long addr, u32 rt) in kvm_patch_ins_std()
118 static void kvm_patch_ins_stw(u32 *inst, long addr, u32 rt) in kvm_patch_ins_stw()
123 static void kvm_patch_ins_nop(u32 *inst) in kvm_patch_ins_nop()
128 static void kvm_patch_ins_b(u32 *inst, int addr) in kvm_patch_ins_b()
164 static void kvm_patch_ins_mtmsrd(u32 *inst, u32 rt) in kvm_patch_ins_mtmsrd()
217 static void kvm_patch_ins_mtmsr(u32 *inst, u32 rt) in kvm_patch_ins_mtmsr()
[all …]
/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
Dstrmux_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dl2cache_defs.h15 #define REG_RD( scope, inst, reg ) \ argument
21 #define REG_WR( scope, inst, reg, val ) \ argument
27 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
41 #define REG_RD_INT( scope, inst, reg ) \ argument
46 #define REG_WR_INT( scope, inst, reg, val ) \ argument
51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
72 #define REG_ADDR( scope, inst, reg ) \ argument
77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/arch/cris/include/arch-v32/mach-fs/mach/hwregs/
Dstrmux_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
Dconfig_defs.h18 #define REG_RD( scope, inst, reg ) \ argument
24 #define REG_WR( scope, inst, reg, val ) \ argument
30 #define REG_RD_VECT( scope, inst, reg, index ) \ argument
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ argument
44 #define REG_RD_INT( scope, inst, reg ) \ argument
49 #define REG_WR_INT( scope, inst, reg, val ) \ argument
54 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ argument
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ argument
75 #define REG_ADDR( scope, inst, reg ) \ argument
80 #define REG_ADDR_VECT( scope, inst, reg, index ) \ argument
/arch/ia64/kvm/
Dvcpu.c1057 void kvm_thash(struct kvm_vcpu *vcpu, INST64 inst) in kvm_thash()
1066 void kvm_ttag(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ttag()
1146 int kvm_tpa(struct kvm_vcpu *vcpu, INST64 inst) in kvm_tpa()
1159 void kvm_tak(struct kvm_vcpu *vcpu, INST64 inst) in kvm_tak()
1277 void kvm_ptc_e(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptc_e()
1285 void kvm_ptc_g(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptc_g()
1294 void kvm_ptc_ga(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptc_ga()
1303 void kvm_ptc_l(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptc_l()
1312 void kvm_ptr_d(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptr_d()
1321 void kvm_ptr_i(struct kvm_vcpu *vcpu, INST64 inst) in kvm_ptr_i()
[all …]
/arch/mips/kvm/
Ddyntrans.c31 int kvm_mips_trans_cache_index(uint32_t inst, uint32_t *opc, in kvm_mips_trans_cache_index()
52 int kvm_mips_trans_cache_va(uint32_t inst, uint32_t *opc, in kvm_mips_trans_cache_va()
73 int kvm_mips_trans_mfc0(uint32_t inst, uint32_t *opc, struct kvm_vcpu *vcpu) in kvm_mips_trans_mfc0()
115 int kvm_mips_trans_mtc0(uint32_t inst, uint32_t *opc, struct kvm_vcpu *vcpu) in kvm_mips_trans_mtc0()

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