1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
11 #ifndef _ASM_X86_KVM_HOST_H
12 #define _ASM_X86_KVM_HOST_H
13
14 #include <linux/types.h>
15 #include <linux/mm.h>
16 #include <linux/mmu_notifier.h>
17 #include <linux/tracepoint.h>
18 #include <linux/cpumask.h>
19 #include <linux/irq_work.h>
20
21 #include <linux/kvm.h>
22 #include <linux/kvm_para.h>
23 #include <linux/kvm_types.h>
24 #include <linux/perf_event.h>
25 #include <linux/pvclock_gtod.h>
26 #include <linux/clocksource.h>
27
28 #include <asm/pvclock-abi.h>
29 #include <asm/desc.h>
30 #include <asm/mtrr.h>
31 #include <asm/msr-index.h>
32 #include <asm/asm.h>
33
34 #define KVM_MAX_VCPUS 255
35 #define KVM_SOFT_MAX_VCPUS 160
36 #define KVM_USER_MEM_SLOTS 125
37 /* memory slots that are not exposed to userspace */
38 #define KVM_PRIVATE_MEM_SLOTS 3
39 #define KVM_MEM_SLOTS_NUM (KVM_USER_MEM_SLOTS + KVM_PRIVATE_MEM_SLOTS)
40
41 #define KVM_MMIO_SIZE 16
42
43 #define KVM_PIO_PAGE_OFFSET 1
44 #define KVM_COALESCED_MMIO_PAGE_OFFSET 2
45
46 #define KVM_IRQCHIP_NUM_PINS KVM_IOAPIC_NUM_PINS
47
48 #define CR0_RESERVED_BITS \
49 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
50 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
51 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
52
53 #define CR3_L_MODE_RESERVED_BITS 0xFFFFFF0000000000ULL
54 #define CR4_RESERVED_BITS \
55 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
56 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
57 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR | X86_CR4_PCIDE \
58 | X86_CR4_OSXSAVE | X86_CR4_SMEP | X86_CR4_FSGSBASE \
59 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE | X86_CR4_SMAP))
60
61 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
62
63
64
65 #define INVALID_PAGE (~(hpa_t)0)
66 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
67
68 #define UNMAPPED_GVA (~(gpa_t)0)
69
70 /* KVM Hugepage definitions for x86 */
71 #define KVM_NR_PAGE_SIZES 3
72 #define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
73 #define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
74 #define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
75 #define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
76 #define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
77
gfn_to_index(gfn_t gfn,gfn_t base_gfn,int level)78 static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
79 {
80 /* KVM_HPAGE_GFN_SHIFT(PT_PAGE_TABLE_LEVEL) must be 0. */
81 return (gfn >> KVM_HPAGE_GFN_SHIFT(level)) -
82 (base_gfn >> KVM_HPAGE_GFN_SHIFT(level));
83 }
84
85 #define SELECTOR_TI_MASK (1 << 2)
86 #define SELECTOR_RPL_MASK 0x03
87
88 #define IOPL_SHIFT 12
89
90 #define KVM_PERMILLE_MMU_PAGES 20
91 #define KVM_MIN_ALLOC_MMU_PAGES 64
92 #define KVM_MMU_HASH_SHIFT 10
93 #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
94 #define KVM_MIN_FREE_MMU_PAGES 5
95 #define KVM_REFILL_PAGES 25
96 #define KVM_MAX_CPUID_ENTRIES 80
97 #define KVM_NR_FIXED_MTRR_REGION 88
98 #define KVM_NR_VAR_MTRR 8
99
100 #define ASYNC_PF_PER_VCPU 64
101
102 enum kvm_reg {
103 VCPU_REGS_RAX = 0,
104 VCPU_REGS_RCX = 1,
105 VCPU_REGS_RDX = 2,
106 VCPU_REGS_RBX = 3,
107 VCPU_REGS_RSP = 4,
108 VCPU_REGS_RBP = 5,
109 VCPU_REGS_RSI = 6,
110 VCPU_REGS_RDI = 7,
111 #ifdef CONFIG_X86_64
112 VCPU_REGS_R8 = 8,
113 VCPU_REGS_R9 = 9,
114 VCPU_REGS_R10 = 10,
115 VCPU_REGS_R11 = 11,
116 VCPU_REGS_R12 = 12,
117 VCPU_REGS_R13 = 13,
118 VCPU_REGS_R14 = 14,
119 VCPU_REGS_R15 = 15,
120 #endif
121 VCPU_REGS_RIP,
122 NR_VCPU_REGS
123 };
124
125 enum kvm_reg_ex {
126 VCPU_EXREG_PDPTR = NR_VCPU_REGS,
127 VCPU_EXREG_CR3,
128 VCPU_EXREG_RFLAGS,
129 VCPU_EXREG_SEGMENTS,
130 };
131
132 enum {
133 VCPU_SREG_ES,
134 VCPU_SREG_CS,
135 VCPU_SREG_SS,
136 VCPU_SREG_DS,
137 VCPU_SREG_FS,
138 VCPU_SREG_GS,
139 VCPU_SREG_TR,
140 VCPU_SREG_LDTR,
141 };
142
143 #include <asm/kvm_emulate.h>
144
145 #define KVM_NR_MEM_OBJS 40
146
147 #define KVM_NR_DB_REGS 4
148
149 #define DR6_BD (1 << 13)
150 #define DR6_BS (1 << 14)
151 #define DR6_RTM (1 << 16)
152 #define DR6_FIXED_1 0xfffe0ff0
153 #define DR6_INIT 0xffff0ff0
154 #define DR6_VOLATILE 0x0001e00f
155
156 #define DR7_BP_EN_MASK 0x000000ff
157 #define DR7_GE (1 << 9)
158 #define DR7_GD (1 << 13)
159 #define DR7_FIXED_1 0x00000400
160 #define DR7_VOLATILE 0xffff2bff
161
162 /* apic attention bits */
163 #define KVM_APIC_CHECK_VAPIC 0
164 /*
165 * The following bit is set with PV-EOI, unset on EOI.
166 * We detect PV-EOI changes by guest by comparing
167 * this bit with PV-EOI in guest memory.
168 * See the implementation in apic_update_pv_eoi.
169 */
170 #define KVM_APIC_PV_EOI_PENDING 1
171
172 /*
173 * We don't want allocation failures within the mmu code, so we preallocate
174 * enough memory for a single page fault in a cache.
175 */
176 struct kvm_mmu_memory_cache {
177 int nobjs;
178 void *objects[KVM_NR_MEM_OBJS];
179 };
180
181 /*
182 * kvm_mmu_page_role, below, is defined as:
183 *
184 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
185 * bits 4:7 - page table level for this shadow (1-4)
186 * bits 8:9 - page table quadrant for 2-level guests
187 * bit 16 - direct mapping of virtual to physical mapping at gfn
188 * used for real mode and two-dimensional paging
189 * bits 17:19 - common access permissions for all ptes in this shadow page
190 */
191 union kvm_mmu_page_role {
192 unsigned word;
193 struct {
194 unsigned level:4;
195 unsigned cr4_pae:1;
196 unsigned quadrant:2;
197 unsigned pad_for_nice_hex_output:6;
198 unsigned direct:1;
199 unsigned access:3;
200 unsigned invalid:1;
201 unsigned nxe:1;
202 unsigned cr0_wp:1;
203 unsigned smep_andnot_wp:1;
204 unsigned smap_andnot_wp:1;
205 };
206 };
207
208 struct kvm_mmu_page {
209 struct list_head link;
210 struct hlist_node hash_link;
211
212 /*
213 * The following two entries are used to key the shadow page in the
214 * hash table.
215 */
216 gfn_t gfn;
217 union kvm_mmu_page_role role;
218
219 u64 *spt;
220 /* hold the gfn of each spte inside spt */
221 gfn_t *gfns;
222 bool unsync;
223 int root_count; /* Currently serving as active root */
224 unsigned int unsync_children;
225 unsigned long parent_ptes; /* Reverse mapping for parent_pte */
226
227 /* The page is obsolete if mmu_valid_gen != kvm->arch.mmu_valid_gen. */
228 unsigned long mmu_valid_gen;
229
230 DECLARE_BITMAP(unsync_child_bitmap, 512);
231
232 #ifdef CONFIG_X86_32
233 /*
234 * Used out of the mmu-lock to avoid reading spte values while an
235 * update is in progress; see the comments in __get_spte_lockless().
236 */
237 int clear_spte_count;
238 #endif
239
240 /* Number of writes since the last time traversal visited this page. */
241 int write_flooding_count;
242 };
243
244 struct kvm_pio_request {
245 unsigned long count;
246 int in;
247 int port;
248 int size;
249 };
250
251 /*
252 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
253 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
254 * mode.
255 */
256 struct kvm_mmu {
257 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long root);
258 unsigned long (*get_cr3)(struct kvm_vcpu *vcpu);
259 u64 (*get_pdptr)(struct kvm_vcpu *vcpu, int index);
260 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err,
261 bool prefault);
262 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
263 struct x86_exception *fault);
264 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva, u32 access,
265 struct x86_exception *exception);
266 gpa_t (*translate_gpa)(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
267 struct x86_exception *exception);
268 int (*sync_page)(struct kvm_vcpu *vcpu,
269 struct kvm_mmu_page *sp);
270 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t gva);
271 void (*update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
272 u64 *spte, const void *pte);
273 hpa_t root_hpa;
274 int root_level;
275 int shadow_root_level;
276 union kvm_mmu_page_role base_role;
277 bool direct_map;
278
279 /*
280 * Bitmap; bit set = permission fault
281 * Byte index: page fault error code [4:1]
282 * Bit index: pte permissions in ACC_* format
283 */
284 u8 permissions[16];
285
286 u64 *pae_root;
287 u64 *lm_root;
288 u64 rsvd_bits_mask[2][4];
289 u64 bad_mt_xwr;
290
291 /*
292 * Bitmap: bit set = last pte in walk
293 * index[0:1]: level (zero-based)
294 * index[2]: pte.ps
295 */
296 u8 last_pte_bitmap;
297
298 bool nx;
299
300 u64 pdptrs[4]; /* pae */
301 };
302
303 enum pmc_type {
304 KVM_PMC_GP = 0,
305 KVM_PMC_FIXED,
306 };
307
308 struct kvm_pmc {
309 enum pmc_type type;
310 u8 idx;
311 u64 counter;
312 u64 eventsel;
313 struct perf_event *perf_event;
314 struct kvm_vcpu *vcpu;
315 };
316
317 struct kvm_pmu {
318 unsigned nr_arch_gp_counters;
319 unsigned nr_arch_fixed_counters;
320 unsigned available_event_types;
321 u64 fixed_ctr_ctrl;
322 u64 global_ctrl;
323 u64 global_status;
324 u64 global_ovf_ctrl;
325 u64 counter_bitmask[2];
326 u64 global_ctrl_mask;
327 u64 reserved_bits;
328 u8 version;
329 struct kvm_pmc gp_counters[INTEL_PMC_MAX_GENERIC];
330 struct kvm_pmc fixed_counters[INTEL_PMC_MAX_FIXED];
331 struct irq_work irq_work;
332 u64 reprogram_pmi;
333 };
334
335 enum {
336 KVM_DEBUGREG_BP_ENABLED = 1,
337 KVM_DEBUGREG_WONT_EXIT = 2,
338 };
339
340 struct kvm_vcpu_arch {
341 /*
342 * rip and regs accesses must go through
343 * kvm_{register,rip}_{read,write} functions.
344 */
345 unsigned long regs[NR_VCPU_REGS];
346 u32 regs_avail;
347 u32 regs_dirty;
348
349 unsigned long cr0;
350 unsigned long cr0_guest_owned_bits;
351 unsigned long cr2;
352 unsigned long cr3;
353 unsigned long cr4;
354 unsigned long cr4_guest_owned_bits;
355 unsigned long cr8;
356 u32 hflags;
357 u64 efer;
358 u64 apic_base;
359 struct kvm_lapic *apic; /* kernel irqchip context */
360 unsigned long apic_attention;
361 int32_t apic_arb_prio;
362 int mp_state;
363 u64 ia32_misc_enable_msr;
364 bool tpr_access_reporting;
365
366 /*
367 * Paging state of the vcpu
368 *
369 * If the vcpu runs in guest mode with two level paging this still saves
370 * the paging mode of the l1 guest. This context is always used to
371 * handle faults.
372 */
373 struct kvm_mmu mmu;
374
375 /*
376 * Paging state of an L2 guest (used for nested npt)
377 *
378 * This context will save all necessary information to walk page tables
379 * of the an L2 guest. This context is only initialized for page table
380 * walking and not for faulting since we never handle l2 page faults on
381 * the host.
382 */
383 struct kvm_mmu nested_mmu;
384
385 /*
386 * Pointer to the mmu context currently used for
387 * gva_to_gpa translations.
388 */
389 struct kvm_mmu *walk_mmu;
390
391 struct kvm_mmu_memory_cache mmu_pte_list_desc_cache;
392 struct kvm_mmu_memory_cache mmu_page_cache;
393 struct kvm_mmu_memory_cache mmu_page_header_cache;
394
395 struct fpu guest_fpu;
396 bool eager_fpu;
397 u64 xcr0;
398 u64 guest_supported_xcr0;
399 u32 guest_xstate_size;
400
401 struct kvm_pio_request pio;
402 void *pio_data;
403
404 u8 event_exit_inst_len;
405
406 struct kvm_queued_exception {
407 bool pending;
408 bool has_error_code;
409 bool reinject;
410 u8 nr;
411 u32 error_code;
412 } exception;
413
414 struct kvm_queued_interrupt {
415 bool pending;
416 bool soft;
417 u8 nr;
418 } interrupt;
419
420 int halt_request; /* real mode on Intel only */
421
422 int cpuid_nent;
423 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
424 /* emulate context */
425
426 struct x86_emulate_ctxt emulate_ctxt;
427 bool emulate_regs_need_sync_to_vcpu;
428 bool emulate_regs_need_sync_from_vcpu;
429 int (*complete_userspace_io)(struct kvm_vcpu *vcpu);
430
431 gpa_t time;
432 struct pvclock_vcpu_time_info hv_clock;
433 unsigned int hw_tsc_khz;
434 struct gfn_to_hva_cache pv_time;
435 bool pv_time_enabled;
436 /* set guest stopped flag in pvclock flags field */
437 bool pvclock_set_guest_stopped_request;
438
439 struct {
440 u64 msr_val;
441 u64 last_steal;
442 u64 accum_steal;
443 struct gfn_to_hva_cache stime;
444 struct kvm_steal_time steal;
445 } st;
446
447 u64 last_guest_tsc;
448 u64 last_host_tsc;
449 u64 tsc_offset_adjustment;
450 u64 this_tsc_nsec;
451 u64 this_tsc_write;
452 u64 this_tsc_generation;
453 bool tsc_catchup;
454 bool tsc_always_catchup;
455 s8 virtual_tsc_shift;
456 u32 virtual_tsc_mult;
457 u32 virtual_tsc_khz;
458 s64 ia32_tsc_adjust_msr;
459
460 atomic_t nmi_queued; /* unprocessed asynchronous NMIs */
461 unsigned nmi_pending; /* NMI queued after currently running handler */
462 bool nmi_injected; /* Trying to inject an NMI this entry */
463
464 struct mtrr_state_type mtrr_state;
465 u64 pat;
466
467 unsigned switch_db_regs;
468 unsigned long db[KVM_NR_DB_REGS];
469 unsigned long dr6;
470 unsigned long dr7;
471 unsigned long eff_db[KVM_NR_DB_REGS];
472 unsigned long guest_debug_dr7;
473
474 u64 mcg_cap;
475 u64 mcg_status;
476 u64 mcg_ctl;
477 u64 *mce_banks;
478
479 /* Cache MMIO info */
480 u64 mmio_gva;
481 unsigned access;
482 gfn_t mmio_gfn;
483 u64 mmio_gen;
484
485 struct kvm_pmu pmu;
486
487 /* used for guest single stepping over the given code position */
488 unsigned long singlestep_rip;
489
490 /* fields used by HYPER-V emulation */
491 u64 hv_vapic;
492
493 cpumask_var_t wbinvd_dirty_mask;
494
495 unsigned long last_retry_eip;
496 unsigned long last_retry_addr;
497
498 struct {
499 bool halted;
500 gfn_t gfns[roundup_pow_of_two(ASYNC_PF_PER_VCPU)];
501 struct gfn_to_hva_cache data;
502 u64 msr_val;
503 u32 id;
504 bool send_user_only;
505 } apf;
506
507 /* OSVW MSRs (AMD only) */
508 struct {
509 u64 length;
510 u64 status;
511 } osvw;
512
513 struct {
514 u64 msr_val;
515 struct gfn_to_hva_cache data;
516 } pv_eoi;
517
518 /*
519 * Indicate whether the access faults on its page table in guest
520 * which is set when fix page fault and used to detect unhandeable
521 * instruction.
522 */
523 bool write_fault_to_shadow_pgtable;
524
525 /* set at EPT violation at this point */
526 unsigned long exit_qualification;
527
528 /* pv related host specific info */
529 struct {
530 bool pv_unhalted;
531 } pv;
532 };
533
534 struct kvm_lpage_info {
535 int write_count;
536 };
537
538 struct kvm_arch_memory_slot {
539 unsigned long *rmap[KVM_NR_PAGE_SIZES];
540 struct kvm_lpage_info *lpage_info[KVM_NR_PAGE_SIZES - 1];
541 };
542
543 struct kvm_apic_map {
544 struct rcu_head rcu;
545 u8 ldr_bits;
546 /* fields bellow are used to decode ldr values in different modes */
547 u32 cid_shift, cid_mask, lid_mask;
548 struct kvm_lapic *phys_map[256];
549 /* first index is cluster id second is cpu id in a cluster */
550 struct kvm_lapic *logical_map[16][16];
551 };
552
553 struct kvm_arch {
554 unsigned int n_used_mmu_pages;
555 unsigned int n_requested_mmu_pages;
556 unsigned int n_max_mmu_pages;
557 unsigned int indirect_shadow_pages;
558 unsigned long mmu_valid_gen;
559 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
560 /*
561 * Hash table of struct kvm_mmu_page.
562 */
563 struct list_head active_mmu_pages;
564 struct list_head zapped_obsolete_pages;
565
566 struct list_head assigned_dev_head;
567 struct iommu_domain *iommu_domain;
568 bool iommu_noncoherent;
569 #define __KVM_HAVE_ARCH_NONCOHERENT_DMA
570 atomic_t noncoherent_dma_count;
571 struct kvm_pic *vpic;
572 struct kvm_ioapic *vioapic;
573 struct kvm_pit *vpit;
574 atomic_t vapics_in_nmi_mode;
575 struct mutex apic_map_lock;
576 struct kvm_apic_map *apic_map;
577
578 unsigned int tss_addr;
579 bool apic_access_page_done;
580
581 gpa_t wall_clock;
582
583 bool ept_identity_pagetable_done;
584 gpa_t ept_identity_map_addr;
585
586 unsigned long irq_sources_bitmap;
587 s64 kvmclock_offset;
588 raw_spinlock_t tsc_write_lock;
589 u64 last_tsc_nsec;
590 u64 last_tsc_write;
591 u32 last_tsc_khz;
592 u64 cur_tsc_nsec;
593 u64 cur_tsc_write;
594 u64 cur_tsc_offset;
595 u64 cur_tsc_generation;
596 int nr_vcpus_matched_tsc;
597
598 spinlock_t pvclock_gtod_sync_lock;
599 bool use_master_clock;
600 u64 master_kernel_ns;
601 cycle_t master_cycle_now;
602 struct delayed_work kvmclock_update_work;
603 struct delayed_work kvmclock_sync_work;
604
605 struct kvm_xen_hvm_config xen_hvm_config;
606
607 /* fields used by HYPER-V emulation */
608 u64 hv_guest_os_id;
609 u64 hv_hypercall;
610 u64 hv_tsc_page;
611
612 #ifdef CONFIG_KVM_MMU_AUDIT
613 int audit_point;
614 #endif
615 };
616
617 struct kvm_vm_stat {
618 u32 mmu_shadow_zapped;
619 u32 mmu_pte_write;
620 u32 mmu_pte_updated;
621 u32 mmu_pde_zapped;
622 u32 mmu_flooded;
623 u32 mmu_recycled;
624 u32 mmu_cache_miss;
625 u32 mmu_unsync;
626 u32 remote_tlb_flush;
627 u32 lpages;
628 };
629
630 struct kvm_vcpu_stat {
631 u32 pf_fixed;
632 u32 pf_guest;
633 u32 tlb_flush;
634 u32 invlpg;
635
636 u32 exits;
637 u32 io_exits;
638 u32 mmio_exits;
639 u32 signal_exits;
640 u32 irq_window_exits;
641 u32 nmi_window_exits;
642 u32 halt_exits;
643 u32 halt_wakeup;
644 u32 request_irq_exits;
645 u32 irq_exits;
646 u32 host_state_reload;
647 u32 efer_reload;
648 u32 fpu_reload;
649 u32 insn_emulation;
650 u32 insn_emulation_fail;
651 u32 hypercalls;
652 u32 irq_injections;
653 u32 nmi_injections;
654 };
655
656 struct x86_instruction_info;
657
658 struct msr_data {
659 bool host_initiated;
660 u32 index;
661 u64 data;
662 };
663
664 struct kvm_x86_ops {
665 int (*cpu_has_kvm_support)(void); /* __init */
666 int (*disabled_by_bios)(void); /* __init */
667 int (*hardware_enable)(void);
668 void (*hardware_disable)(void);
669 void (*check_processor_compatibility)(void *rtn);
670 int (*hardware_setup)(void); /* __init */
671 void (*hardware_unsetup)(void); /* __exit */
672 bool (*cpu_has_accelerated_tpr)(void);
673 void (*cpuid_update)(struct kvm_vcpu *vcpu);
674
675 /* Create, but do not attach this VCPU */
676 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
677 void (*vcpu_free)(struct kvm_vcpu *vcpu);
678 void (*vcpu_reset)(struct kvm_vcpu *vcpu);
679
680 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
681 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
682 void (*vcpu_put)(struct kvm_vcpu *vcpu);
683
684 void (*update_db_bp_intercept)(struct kvm_vcpu *vcpu);
685 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
686 int (*set_msr)(struct kvm_vcpu *vcpu, struct msr_data *msr);
687 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
688 void (*get_segment)(struct kvm_vcpu *vcpu,
689 struct kvm_segment *var, int seg);
690 int (*get_cpl)(struct kvm_vcpu *vcpu);
691 void (*set_segment)(struct kvm_vcpu *vcpu,
692 struct kvm_segment *var, int seg);
693 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
694 void (*decache_cr0_guest_bits)(struct kvm_vcpu *vcpu);
695 void (*decache_cr3)(struct kvm_vcpu *vcpu);
696 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
697 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
698 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
699 int (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
700 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
701 void (*get_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
702 void (*set_idt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
703 void (*get_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
704 void (*set_gdt)(struct kvm_vcpu *vcpu, struct desc_ptr *dt);
705 u64 (*get_dr6)(struct kvm_vcpu *vcpu);
706 void (*set_dr6)(struct kvm_vcpu *vcpu, unsigned long value);
707 void (*sync_dirty_debug_regs)(struct kvm_vcpu *vcpu);
708 void (*set_dr7)(struct kvm_vcpu *vcpu, unsigned long value);
709 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
710 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
711 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
712 void (*fpu_activate)(struct kvm_vcpu *vcpu);
713 void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
714
715 void (*tlb_flush)(struct kvm_vcpu *vcpu);
716
717 void (*run)(struct kvm_vcpu *vcpu);
718 int (*handle_exit)(struct kvm_vcpu *vcpu);
719 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
720 void (*set_interrupt_shadow)(struct kvm_vcpu *vcpu, int mask);
721 u32 (*get_interrupt_shadow)(struct kvm_vcpu *vcpu);
722 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
723 unsigned char *hypercall_addr);
724 void (*set_irq)(struct kvm_vcpu *vcpu);
725 void (*set_nmi)(struct kvm_vcpu *vcpu);
726 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
727 bool has_error_code, u32 error_code,
728 bool reinject);
729 void (*cancel_injection)(struct kvm_vcpu *vcpu);
730 int (*interrupt_allowed)(struct kvm_vcpu *vcpu);
731 int (*nmi_allowed)(struct kvm_vcpu *vcpu);
732 bool (*get_nmi_mask)(struct kvm_vcpu *vcpu);
733 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
734 void (*enable_nmi_window)(struct kvm_vcpu *vcpu);
735 void (*enable_irq_window)(struct kvm_vcpu *vcpu);
736 void (*update_cr8_intercept)(struct kvm_vcpu *vcpu, int tpr, int irr);
737 int (*vm_has_apicv)(struct kvm *kvm);
738 void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
739 void (*hwapic_isr_update)(struct kvm *kvm, int isr);
740 void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
741 void (*set_virtual_x2apic_mode)(struct kvm_vcpu *vcpu, bool set);
742 void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
743 void (*deliver_posted_interrupt)(struct kvm_vcpu *vcpu, int vector);
744 void (*sync_pir_to_irr)(struct kvm_vcpu *vcpu);
745 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
746 int (*get_tdp_level)(void);
747 u64 (*get_mt_mask)(struct kvm_vcpu *vcpu, gfn_t gfn, bool is_mmio);
748 int (*get_lpage_level)(void);
749 bool (*rdtscp_supported)(void);
750 bool (*invpcid_supported)(void);
751 void (*adjust_tsc_offset)(struct kvm_vcpu *vcpu, s64 adjustment, bool host);
752
753 void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
754
755 void (*set_supported_cpuid)(u32 func, struct kvm_cpuid_entry2 *entry);
756
757 bool (*has_wbinvd_exit)(void);
758
759 void (*set_tsc_khz)(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale);
760 u64 (*read_tsc_offset)(struct kvm_vcpu *vcpu);
761 void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
762
763 u64 (*compute_tsc_offset)(struct kvm_vcpu *vcpu, u64 target_tsc);
764 u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
765
766 void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
767
768 int (*check_intercept)(struct kvm_vcpu *vcpu,
769 struct x86_instruction_info *info,
770 enum x86_intercept_stage stage);
771 void (*handle_external_intr)(struct kvm_vcpu *vcpu);
772 bool (*mpx_supported)(void);
773
774 int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
775
776 void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
777 };
778
779 struct kvm_arch_async_pf {
780 u32 token;
781 gfn_t gfn;
782 unsigned long cr3;
783 bool direct_map;
784 };
785
786 extern struct kvm_x86_ops *kvm_x86_ops;
787
adjust_tsc_offset_guest(struct kvm_vcpu * vcpu,s64 adjustment)788 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
789 s64 adjustment)
790 {
791 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, false);
792 }
793
adjust_tsc_offset_host(struct kvm_vcpu * vcpu,s64 adjustment)794 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
795 {
796 kvm_x86_ops->adjust_tsc_offset(vcpu, adjustment, true);
797 }
798
799 int kvm_mmu_module_init(void);
800 void kvm_mmu_module_exit(void);
801
802 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
803 int kvm_mmu_create(struct kvm_vcpu *vcpu);
804 void kvm_mmu_setup(struct kvm_vcpu *vcpu);
805 void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
806 u64 dirty_mask, u64 nx_mask, u64 x_mask);
807
808 void kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
809 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
810 void kvm_mmu_write_protect_pt_masked(struct kvm *kvm,
811 struct kvm_memory_slot *slot,
812 gfn_t gfn_offset, unsigned long mask);
813 void kvm_mmu_zap_all(struct kvm *kvm);
814 void kvm_mmu_invalidate_mmio_sptes(struct kvm *kvm);
815 unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
816 void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
817
818 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3);
819
820 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
821 const void *val, int bytes);
822 u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
823
824 extern bool tdp_enabled;
825
826 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu);
827
828 /* control of guest tsc rate supported? */
829 extern bool kvm_has_tsc_control;
830 /* minimum supported tsc_khz for guests */
831 extern u32 kvm_min_guest_tsc_khz;
832 /* maximum supported tsc_khz for guests */
833 extern u32 kvm_max_guest_tsc_khz;
834
835 enum emulation_result {
836 EMULATE_DONE, /* no further processing */
837 EMULATE_USER_EXIT, /* kvm_run ready for userspace exit */
838 EMULATE_FAIL, /* can't emulate this instruction */
839 };
840
841 #define EMULTYPE_NO_DECODE (1 << 0)
842 #define EMULTYPE_TRAP_UD (1 << 1)
843 #define EMULTYPE_SKIP (1 << 2)
844 #define EMULTYPE_RETRY (1 << 3)
845 #define EMULTYPE_NO_REEXECUTE (1 << 4)
846 int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
847 int emulation_type, void *insn, int insn_len);
848
emulate_instruction(struct kvm_vcpu * vcpu,int emulation_type)849 static inline int emulate_instruction(struct kvm_vcpu *vcpu,
850 int emulation_type)
851 {
852 return x86_emulate_instruction(vcpu, 0,
853 emulation_type | EMULTYPE_NO_REEXECUTE, NULL, 0);
854 }
855
856 void kvm_enable_efer_bits(u64);
857 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
858 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
859 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr);
860
861 struct x86_emulate_ctxt;
862
863 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port);
864 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
865 int kvm_emulate_halt(struct kvm_vcpu *vcpu);
866 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
867
868 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
869 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
870 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, unsigned int vector);
871
872 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
873 int reason, bool has_error_code, u32 error_code);
874
875 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
876 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
877 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
878 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
879 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val);
880 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val);
881 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
882 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
883 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
884 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr);
885
886 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
887 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr);
888
889 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu);
890 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
891 bool kvm_rdpmc(struct kvm_vcpu *vcpu);
892
893 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
894 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
895 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr);
896 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
897 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault);
898 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
899 gfn_t gfn, void *data, int offset, int len,
900 u32 access);
901 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl);
902
__kvm_irq_line_state(unsigned long * irq_state,int irq_source_id,int level)903 static inline int __kvm_irq_line_state(unsigned long *irq_state,
904 int irq_source_id, int level)
905 {
906 /* Logical OR for level trig interrupt */
907 if (level)
908 __set_bit(irq_source_id, irq_state);
909 else
910 __clear_bit(irq_source_id, irq_state);
911
912 return !!(*irq_state);
913 }
914
915 int kvm_pic_set_irq(struct kvm_pic *pic, int irq, int irq_source_id, int level);
916 void kvm_pic_clear_all(struct kvm_pic *pic, int irq_source_id);
917
918 void kvm_inject_nmi(struct kvm_vcpu *vcpu);
919
920 int fx_init(struct kvm_vcpu *vcpu);
921
922 void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
923 const u8 *new, int bytes);
924 int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn);
925 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
926 void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
927 int kvm_mmu_load(struct kvm_vcpu *vcpu);
928 void kvm_mmu_unload(struct kvm_vcpu *vcpu);
929 void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu);
930 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
931 struct x86_exception *exception);
932 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
933 struct x86_exception *exception);
934 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
935 struct x86_exception *exception);
936 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
937 struct x86_exception *exception);
938 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
939 struct x86_exception *exception);
940
941 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
942
943 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code,
944 void *insn, int insn_len);
945 void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva);
946 void kvm_mmu_new_cr3(struct kvm_vcpu *vcpu);
947
948 void kvm_enable_tdp(void);
949 void kvm_disable_tdp(void);
950
translate_gpa(struct kvm_vcpu * vcpu,gpa_t gpa,u32 access,struct x86_exception * exception)951 static inline gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
952 struct x86_exception *exception)
953 {
954 return gpa;
955 }
956
page_header(hpa_t shadow_page)957 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
958 {
959 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
960
961 return (struct kvm_mmu_page *)page_private(page);
962 }
963
kvm_read_ldt(void)964 static inline u16 kvm_read_ldt(void)
965 {
966 u16 ldt;
967 asm("sldt %0" : "=g"(ldt));
968 return ldt;
969 }
970
kvm_load_ldt(u16 sel)971 static inline void kvm_load_ldt(u16 sel)
972 {
973 asm("lldt %0" : : "rm"(sel));
974 }
975
976 #ifdef CONFIG_X86_64
read_msr(unsigned long msr)977 static inline unsigned long read_msr(unsigned long msr)
978 {
979 u64 value;
980
981 rdmsrl(msr, value);
982 return value;
983 }
984 #endif
985
get_rdx_init_val(void)986 static inline u32 get_rdx_init_val(void)
987 {
988 return 0x600; /* P6 family */
989 }
990
kvm_inject_gp(struct kvm_vcpu * vcpu,u32 error_code)991 static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
992 {
993 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
994 }
995
get_canonical(u64 la)996 static inline u64 get_canonical(u64 la)
997 {
998 return ((int64_t)la << 16) >> 16;
999 }
1000
is_noncanonical_address(u64 la)1001 static inline bool is_noncanonical_address(u64 la)
1002 {
1003 #ifdef CONFIG_X86_64
1004 return get_canonical(la) != la;
1005 #else
1006 return false;
1007 #endif
1008 }
1009
1010 #define TSS_IOPB_BASE_OFFSET 0x66
1011 #define TSS_BASE_SIZE 0x68
1012 #define TSS_IOPB_SIZE (65536 / 8)
1013 #define TSS_REDIRECTION_SIZE (256 / 8)
1014 #define RMODE_TSS_SIZE \
1015 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
1016
1017 enum {
1018 TASK_SWITCH_CALL = 0,
1019 TASK_SWITCH_IRET = 1,
1020 TASK_SWITCH_JMP = 2,
1021 TASK_SWITCH_GATE = 3,
1022 };
1023
1024 #define HF_GIF_MASK (1 << 0)
1025 #define HF_HIF_MASK (1 << 1)
1026 #define HF_VINTR_MASK (1 << 2)
1027 #define HF_NMI_MASK (1 << 3)
1028 #define HF_IRET_MASK (1 << 4)
1029 #define HF_GUEST_MASK (1 << 5) /* VCPU is in guest-mode */
1030
1031 /*
1032 * Hardware virtualization extension instructions may fault if a
1033 * reboot turns off virtualization while processes are running.
1034 * Trap the fault and ignore the instruction if that happens.
1035 */
1036 asmlinkage void kvm_spurious_fault(void);
1037
1038 #define ____kvm_handle_fault_on_reboot(insn, cleanup_insn) \
1039 "666: " insn "\n\t" \
1040 "668: \n\t" \
1041 ".pushsection .fixup, \"ax\" \n" \
1042 "667: \n\t" \
1043 cleanup_insn "\n\t" \
1044 "cmpb $0, kvm_rebooting \n\t" \
1045 "jne 668b \n\t" \
1046 __ASM_SIZE(push) " $666b \n\t" \
1047 "call kvm_spurious_fault \n\t" \
1048 ".popsection \n\t" \
1049 _ASM_EXTABLE(666b, 667b)
1050
1051 #define __kvm_handle_fault_on_reboot(insn) \
1052 ____kvm_handle_fault_on_reboot(insn, "")
1053
1054 #define KVM_ARCH_WANT_MMU_NOTIFIER
1055 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
1056 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
1057 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
1058 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
1059 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
1060 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu);
1061 int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v);
1062 int kvm_cpu_has_interrupt(struct kvm_vcpu *vcpu);
1063 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
1064 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
1065 void kvm_vcpu_reset(struct kvm_vcpu *vcpu);
1066 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
1067 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
1068 unsigned long address);
1069
1070 void kvm_define_shared_msr(unsigned index, u32 msr);
1071 int kvm_set_shared_msr(unsigned index, u64 val, u64 mask);
1072
1073 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip);
1074
1075 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
1076 struct kvm_async_pf *work);
1077 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
1078 struct kvm_async_pf *work);
1079 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu,
1080 struct kvm_async_pf *work);
1081 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu);
1082 extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
1083
1084 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
1085
1086 int kvm_is_in_guest(void);
1087
1088 void kvm_pmu_init(struct kvm_vcpu *vcpu);
1089 void kvm_pmu_destroy(struct kvm_vcpu *vcpu);
1090 void kvm_pmu_reset(struct kvm_vcpu *vcpu);
1091 void kvm_pmu_cpuid_update(struct kvm_vcpu *vcpu);
1092 bool kvm_pmu_msr(struct kvm_vcpu *vcpu, u32 msr);
1093 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
1094 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
1095 int kvm_pmu_check_pmc(struct kvm_vcpu *vcpu, unsigned pmc);
1096 int kvm_pmu_read_pmc(struct kvm_vcpu *vcpu, unsigned pmc, u64 *data);
1097 void kvm_handle_pmu_event(struct kvm_vcpu *vcpu);
1098 void kvm_deliver_pmi(struct kvm_vcpu *vcpu);
1099
1100 #endif /* _ASM_X86_KVM_HOST_H */
1101