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Searched defs:pll (Results 1 – 25 of 95) sorted by relevance

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/drivers/clk/tegra/
Dclk-pll.c223 static void clk_pll_enable_lock(struct tegra_clk_pll *pll) in clk_pll_enable_lock()
238 static int clk_pll_wait_for_lock(struct tegra_clk_pll *pll) in clk_pll_wait_for_lock()
274 struct tegra_clk_pll *pll = to_clk_pll(hw); in clk_pll_is_enabled() local
290 struct tegra_clk_pll *pll = to_clk_pll(hw); in _clk_pll_enable() local
310 struct tegra_clk_pll *pll = to_clk_pll(hw); in _clk_pll_disable() local
328 struct tegra_clk_pll *pll = to_clk_pll(hw); in clk_pll_enable() local
347 struct tegra_clk_pll *pll = to_clk_pll(hw); in clk_pll_disable() local
361 struct tegra_clk_pll *pll = to_clk_pll(hw); in _p_div_to_hw() local
377 struct tegra_clk_pll *pll = to_clk_pll(hw); in _hw_to_p_div() local
396 struct tegra_clk_pll *pll = to_clk_pll(hw); in _get_table_rate() local
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/drivers/clk/qcom/
Dclk-pll.c39 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable() local
84 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_disable() local
99 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate() local
146 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_determine_rate() local
159 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate() local
195 static int wait_for_pll(struct clk_pll *pll) in wait_for_pll()
235 clk_pll_set_fsm_mode(struct clk_pll *pll, struct regmap *regmap, u8 lock_count) in clk_pll_set_fsm_mode()
254 static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure()
281 void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure_sr()
290 void clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap, in clk_pll_configure_sr_hpm_lp()
/drivers/video/fbdev/aty/
Dmach64_gx.c80 const union aty_pll *pll, u32 bpp, u32 accel) in aty_set_dac_514()
123 u32 bpp, union aty_pll *pll) in aty_var_to_pll_514()
161 const union aty_pll *pll) in aty_pll_514_to_var()
175 const union aty_pll *pll) in aty_set_pll_514()
205 const union aty_pll *pll, u32 bpp, in aty_set_dac_ATI68860_B()
288 const union aty_pll *pll, u32 bpp, in aty_set_dac_ATT21C498()
341 u32 bpp, union aty_pll *pll) in aty_var_to_pll_18818()
400 const union aty_pll *pll) in aty_pll_18818_to_var()
429 const union aty_pll *pll) in aty_set_pll18818()
497 u32 bpp, union aty_pll *pll) in aty_var_to_pll_1703()
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Dmach64_ct.c119 static int aty_dsp_gt(const struct fb_info *info, u32 bpp, struct pll_ct *pll) in aty_dsp_gt()
208 static int aty_valid_pll_ct(const struct fb_info *info, u32 vclk_per, struct pll_ct *pll) in aty_valid_pll_ct()
250 static int aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) in aty_var_to_pll_ct()
263 static u32 aty_pll_to_var_ct(const struct fb_info *info, const union aty_pll *pll) in aty_pll_to_var_ct()
280 void aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll) in aty_set_pll_ct()
376 static void aty_get_pll_ct(const struct fb_info *info, union aty_pll *pll) in aty_get_pll_ct()
399 static int aty_init_pll_ct(const struct fb_info *info, union aty_pll *pll) in aty_init_pll_ct()
605 union aty_pll *pll) in aty_resume_pll_ct()
/drivers/clk/mxs/
Dclk-pll.c41 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_prepare() local
52 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_unprepare() local
59 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_enable() local
68 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_disable() local
76 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate() local
92 struct clk_pll *pll; in mxs_clk_pll() local
/drivers/video/fbdev/omap2/dss/
Dhdmi_pll.c38 void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s) in hdmi_pll_dump()
54 void hdmi_pll_compute(struct hdmi_pll_data *pll, unsigned long clkin, int phy) in hdmi_pll_compute()
107 static int hdmi_pll_config(struct hdmi_pll_data *pll) in hdmi_pll_config()
169 static int hdmi_pll_reset(struct hdmi_pll_data *pll) in hdmi_pll_reset()
184 int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) in hdmi_pll_enable()
207 void hdmi_pll_disable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) in hdmi_pll_disable()
268 int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll) in hdmi_pll_init()
/drivers/clk/rockchip/
Dclk-pll.c52 struct rockchip_clk_pll *pll, unsigned long rate) in rockchip_get_pll_settings()
68 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); in rockchip_pll_round_rate() local
87 static int rockchip_pll_wait_lock(struct rockchip_clk_pll *pll) in rockchip_pll_wait_lock()
132 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); in rockchip_rk3066_pll_recalc_rate() local
160 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); in rockchip_rk3066_pll_set_rate() local
235 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); in rockchip_rk3066_pll_enable() local
245 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); in rockchip_rk3066_pll_disable() local
254 struct rockchip_clk_pll *pll = to_rockchip_clk_pll(hw); in rockchip_rk3066_pll_is_enabled() local
289 struct rockchip_clk_pll *pll; in rockchip_clk_register_pll() local
/drivers/clk/samsung/
Dclk-pll.c32 struct samsung_clk_pll *pll, unsigned long rate) in samsung_get_pll_settings()
48 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll_round_rate() local
76 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll2126_recalc_rate() local
109 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll3000_recalc_rate() local
146 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll35xx_recalc_rate() local
175 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll35xx_set_rate() local
249 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll36xx_recalc_rate() local
284 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll36xx_set_rate() local
363 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll45xx_recalc_rate() local
397 struct samsung_clk_pll *pll = to_clk_pll(hw); in samsung_pll45xx_set_rate() local
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/drivers/video/fbdev/matrox/
Dg450_pll.c137 unsigned int mnp, unsigned int pll) in g450_setpll()
174 unsigned int mnp, unsigned int pll) in g450_cmppll()
230 unsigned int pll) in g450_testpll()
235 static void updatehwstate_clk(struct matrox_hw_state* hw, unsigned int mnp, unsigned int pll) { in updatehwstate_clk()
246 unsigned int pll) in matroxfb_g450_setpll_cond()
254 unsigned int pll, in g450_findworkingpll()
332 unsigned int pll, unsigned int *mnparray, in __g450_setclk()
517 unsigned int pll) in matroxfb_g450_setclk()
/drivers/clk/at91/
Dclk-pll.c74 struct clk_pll *pll = (struct clk_pll *)dev_id; in clk_pll_irq_handler() local
84 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_prepare() local
132 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_is_prepared() local
141 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_unprepare() local
153 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate() local
161 static long clk_pll_get_best_div_mul(struct clk_pll *pll, unsigned long rate, in clk_pll_get_best_div_mul()
274 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_round_rate() local
283 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate() local
316 struct clk_pll *pll; in at91_clk_register_pll() local
/drivers/clk/st/
Dclkgen-pll.c260 struct clkgen_pll *pll = to_clkgen_pll(hw); in clkgen_pll_is_locked() local
268 struct clkgen_pll *pll = to_clkgen_pll(hw); in clkgen_pll_is_enabled() local
276 struct clkgen_pll *pll = to_clkgen_pll(hw); in recalc_stm_pll800c65() local
303 struct clkgen_pll *pll = to_clkgen_pll(hw); in recalc_stm_pll1600c65() local
327 struct clkgen_pll *pll = to_clkgen_pll(hw); in recalc_stm_pll3200c32() local
349 struct clkgen_pll *pll = to_clkgen_pll(hw); in recalc_stm_pll1200c32() local
398 struct clkgen_pll *pll; in clkgen_pll_register() local
Dclkgen.h41 #define CLKGEN_READ(pll, field) clkgen_read(pll->regs_base, \ argument
44 #define CLKGEN_WRITE(pll, field, val) clkgen_write(pll->regs_base, \ argument
Dclkgen-fsyn.c427 struct st_clk_quadfs_pll *pll = to_quadfs_pll(hw); in quadfs_pll_enable() local
468 struct st_clk_quadfs_pll *pll = to_quadfs_pll(hw); in quadfs_pll_disable() local
489 struct st_clk_quadfs_pll *pll = to_quadfs_pll(hw); in quadfs_pll_is_enabled() local
508 struct st_clk_quadfs_pll *pll = to_quadfs_pll(hw); in quadfs_pll_fs660c32_recalc_rate() local
571 struct st_clk_quadfs_pll *pll = to_quadfs_pll(hw); in quadfs_pll_fs660c32_set_rate() local
622 struct st_clk_quadfs_pll *pll; in st_clk_register_quadfs_pll() local
/drivers/media/i2c/
Dsmiapp-pll.c66 static void print_pll(struct device *dev, struct smiapp_pll *pll) in print_pll()
103 struct smiapp_pll *pll, uint32_t mul, in __smiapp_pll_calculate()
380 struct smiapp_pll *pll) in smiapp_pll_calculate()
Daptina-pll.c31 struct aptina_pll *pll) in aptina_pll_calculate()
/drivers/cpufreq/
Dcpufreq-nforce2.c67 static int nforce2_calc_fsb(int pll) in nforce2_calc_fsb()
116 static void nforce2_write_pll(int pll) in nforce2_write_pll()
174 int pll = 0; in nforce2_set_fsb() local
Ds3c24xx-cpufreq.c83 unsigned long pll = cfg->pll.frequency; in s3c_cpufreq_calc() local
155 struct cpufreq_frequency_table *pll) in s3c_cpufreq_settarget()
279 struct cpufreq_frequency_table *pll; in s3c_cpufreq_target() local
/drivers/clk/spear/
Dclk-vco-pll.c87 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_round_rate_index() local
127 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_recalc_rate() local
147 struct clk_pll *pll = to_clk_pll(hw); in clk_pll_set_rate() local
283 struct clk_pll *pll; in clk_register_vco_pll() local
/drivers/clk/
Dclk-nomadik.c167 struct clk_pll *pll = to_pll(hw); in pll_clk_enable() local
187 struct clk_pll *pll = to_pll(hw); in pll_clk_disable() local
206 struct clk_pll *pll = to_pll(hw); in pll_clk_is_enabled() local
222 struct clk_pll *pll = to_pll(hw); in pll_clk_recalc_rate() local
262 struct clk_pll *pll; in pll_clk_register() local
/drivers/video/fbdev/via/
Dvia_clock.c36 static inline u32 cle266_encode_pll(struct via_pll_config pll) in cle266_encode_pll()
43 static inline u32 k800_encode_pll(struct via_pll_config pll) in k800_encode_pll()
50 static inline u32 vx855_encode_pll(struct via_pll_config pll) in vx855_encode_pll()
Dvia_clock.h63 struct via_pll_config pll) in get_pll_internal_frequency()
69 struct via_pll_config pll) in get_pll_output_frequency()
/drivers/gpu/drm/nouveau/core/subdev/clock/
Dnva3.c107 read_pll(struct nva3_clock_priv *priv, int clk, u32 pll) in read_pll()
226 nva3_pll_info(struct nouveau_clock *clock, int clk, u32 pll, u32 khz, in nva3_pll_info()
267 int clk, u32 pll, int idx) in calc_clk()
340 prog_pll(struct nva3_clock_priv *priv, int clk, u32 pll, int idx) in prog_pll()
Dnva3.h8 u32 pll; member
/drivers/clk/berlin/
Dberlin2-pll.c62 struct berlin2_pll *pll = to_berlin2_pll(hw); in berlin2_pll_recalc_rate() local
100 struct berlin2_pll *pll; in berlin2_pll_register() local
/drivers/char/
Dgenrtc.c270 struct rtc_pll_info pll; in gen_rtc_ioctl() local
394 struct rtc_pll_info pll; in gen_rtc_proc_show() local

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