Searched defs:pll_ref_div (Results 1 – 7 of 7) sorted by relevance
41 u32 val, pll_ref_div; in tegra_osc_clk_init() local
585 u32 pll_ref_div = osc_ctrl & OSC_CTRL_PLL_REF_DIV_MASK; in tegra20_clk_measure_input_freq() local617 u32 pll_ref_div = readl_relaxed(clk_base + OSC_CTRL) & in tegra20_get_pll_ref_div() local876 unsigned int pll_ref_div; in tegra20_osc_clk_init() local
947 u32 val, pll_ref_div; in tegra114_osc_clk_init() local
747 uint32_t pll_ref_div = 0; in radeon_set_pll() local
1802 u8 pll_ref_div; member2457 u8 pll_ref_div = aty_ld_pll_ct(PLL_REF_DIV, par); in aty_init() local
82 u8 pll_ref_div; member
665 u32 pll_ref_div : 4; member