1 #ifndef __marb_foo_defs_h 2 #define __marb_foo_defs_h 3 4 /* 5 * This file is autogenerated from 6 * file: marb_foo.r 7 * 8 * by ../../../tools/rdesc/bin/rdes2c -outfile marb_foo_defs.h marb_foo.r 9 * Any changes here will be lost. 10 * 11 * -*- buffer-read-only: t -*- 12 */ 13 /* Main access macros */ 14 #ifndef REG_RD 15 #define REG_RD( scope, inst, reg ) \ 16 REG_READ( reg_##scope##_##reg, \ 17 (inst) + REG_RD_ADDR_##scope##_##reg ) 18 #endif 19 20 #ifndef REG_WR 21 #define REG_WR( scope, inst, reg, val ) \ 22 REG_WRITE( reg_##scope##_##reg, \ 23 (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) 24 #endif 25 26 #ifndef REG_RD_VECT 27 #define REG_RD_VECT( scope, inst, reg, index ) \ 28 REG_READ( reg_##scope##_##reg, \ 29 (inst) + REG_RD_ADDR_##scope##_##reg + \ 30 (index) * STRIDE_##scope##_##reg ) 31 #endif 32 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ 35 REG_WRITE( reg_##scope##_##reg, \ 36 (inst) + REG_WR_ADDR_##scope##_##reg + \ 37 (index) * STRIDE_##scope##_##reg, (val) ) 38 #endif 39 40 #ifndef REG_RD_INT 41 #define REG_RD_INT( scope, inst, reg ) \ 42 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg ) 43 #endif 44 45 #ifndef REG_WR_INT 46 #define REG_WR_INT( scope, inst, reg, val ) \ 47 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) 48 #endif 49 50 #ifndef REG_RD_INT_VECT 51 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ 52 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \ 53 (index) * STRIDE_##scope##_##reg ) 54 #endif 55 56 #ifndef REG_WR_INT_VECT 57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ 58 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \ 59 (index) * STRIDE_##scope##_##reg, (val) ) 60 #endif 61 62 #ifndef REG_TYPE_CONV 63 #define REG_TYPE_CONV( type, orgtype, val ) \ 64 ( { union { orgtype o; type n; } r; r.o = val; r.n; } ) 65 #endif 66 67 #ifndef reg_page_size 68 #define reg_page_size 8192 69 #endif 70 71 #ifndef REG_ADDR 72 #define REG_ADDR( scope, inst, reg ) \ 73 ( (inst) + REG_RD_ADDR_##scope##_##reg ) 74 #endif 75 76 #ifndef REG_ADDR_VECT 77 #define REG_ADDR_VECT( scope, inst, reg, index ) \ 78 ( (inst) + REG_RD_ADDR_##scope##_##reg + \ 79 (index) * STRIDE_##scope##_##reg ) 80 #endif 81 82 /* C-code for register scope marb_foo */ 83 84 #define STRIDE_marb_foo_rw_intm_slots 4 85 /* Register rw_intm_slots, scope marb_foo, type rw */ 86 typedef struct { 87 unsigned int owner : 4; 88 unsigned int dummy1 : 28; 89 } reg_marb_foo_rw_intm_slots; 90 #define REG_RD_ADDR_marb_foo_rw_intm_slots 0 91 #define REG_WR_ADDR_marb_foo_rw_intm_slots 0 92 93 #define STRIDE_marb_foo_rw_l2_slots 4 94 /* Register rw_l2_slots, scope marb_foo, type rw */ 95 typedef struct { 96 unsigned int owner : 4; 97 unsigned int dummy1 : 28; 98 } reg_marb_foo_rw_l2_slots; 99 #define REG_RD_ADDR_marb_foo_rw_l2_slots 256 100 #define REG_WR_ADDR_marb_foo_rw_l2_slots 256 101 102 #define STRIDE_marb_foo_rw_regs_slots 4 103 /* Register rw_regs_slots, scope marb_foo, type rw */ 104 typedef struct { 105 unsigned int owner : 4; 106 unsigned int dummy1 : 28; 107 } reg_marb_foo_rw_regs_slots; 108 #define REG_RD_ADDR_marb_foo_rw_regs_slots 512 109 #define REG_WR_ADDR_marb_foo_rw_regs_slots 512 110 111 /* Register rw_sclr_burst, scope marb_foo, type rw */ 112 typedef struct { 113 unsigned int intm_bsize : 2; 114 unsigned int l2_bsize : 2; 115 unsigned int dummy1 : 28; 116 } reg_marb_foo_rw_sclr_burst; 117 #define REG_RD_ADDR_marb_foo_rw_sclr_burst 528 118 #define REG_WR_ADDR_marb_foo_rw_sclr_burst 528 119 120 /* Register rw_dma0_burst, scope marb_foo, type rw */ 121 typedef struct { 122 unsigned int intm_bsize : 2; 123 unsigned int l2_bsize : 2; 124 unsigned int dummy1 : 28; 125 } reg_marb_foo_rw_dma0_burst; 126 #define REG_RD_ADDR_marb_foo_rw_dma0_burst 532 127 #define REG_WR_ADDR_marb_foo_rw_dma0_burst 532 128 129 /* Register rw_dma1_burst, scope marb_foo, type rw */ 130 typedef struct { 131 unsigned int intm_bsize : 2; 132 unsigned int l2_bsize : 2; 133 unsigned int dummy1 : 28; 134 } reg_marb_foo_rw_dma1_burst; 135 #define REG_RD_ADDR_marb_foo_rw_dma1_burst 536 136 #define REG_WR_ADDR_marb_foo_rw_dma1_burst 536 137 138 /* Register rw_dma2_burst, scope marb_foo, type rw */ 139 typedef struct { 140 unsigned int intm_bsize : 2; 141 unsigned int l2_bsize : 2; 142 unsigned int dummy1 : 28; 143 } reg_marb_foo_rw_dma2_burst; 144 #define REG_RD_ADDR_marb_foo_rw_dma2_burst 540 145 #define REG_WR_ADDR_marb_foo_rw_dma2_burst 540 146 147 /* Register rw_dma3_burst, scope marb_foo, type rw */ 148 typedef struct { 149 unsigned int intm_bsize : 2; 150 unsigned int l2_bsize : 2; 151 unsigned int dummy1 : 28; 152 } reg_marb_foo_rw_dma3_burst; 153 #define REG_RD_ADDR_marb_foo_rw_dma3_burst 544 154 #define REG_WR_ADDR_marb_foo_rw_dma3_burst 544 155 156 /* Register rw_dma4_burst, scope marb_foo, type rw */ 157 typedef struct { 158 unsigned int intm_bsize : 2; 159 unsigned int l2_bsize : 2; 160 unsigned int dummy1 : 28; 161 } reg_marb_foo_rw_dma4_burst; 162 #define REG_RD_ADDR_marb_foo_rw_dma4_burst 548 163 #define REG_WR_ADDR_marb_foo_rw_dma4_burst 548 164 165 /* Register rw_dma5_burst, scope marb_foo, type rw */ 166 typedef struct { 167 unsigned int intm_bsize : 2; 168 unsigned int l2_bsize : 2; 169 unsigned int dummy1 : 28; 170 } reg_marb_foo_rw_dma5_burst; 171 #define REG_RD_ADDR_marb_foo_rw_dma5_burst 552 172 #define REG_WR_ADDR_marb_foo_rw_dma5_burst 552 173 174 /* Register rw_dma6_burst, scope marb_foo, type rw */ 175 typedef struct { 176 unsigned int intm_bsize : 2; 177 unsigned int l2_bsize : 2; 178 unsigned int dummy1 : 28; 179 } reg_marb_foo_rw_dma6_burst; 180 #define REG_RD_ADDR_marb_foo_rw_dma6_burst 556 181 #define REG_WR_ADDR_marb_foo_rw_dma6_burst 556 182 183 /* Register rw_dma7_burst, scope marb_foo, type rw */ 184 typedef struct { 185 unsigned int intm_bsize : 2; 186 unsigned int l2_bsize : 2; 187 unsigned int dummy1 : 28; 188 } reg_marb_foo_rw_dma7_burst; 189 #define REG_RD_ADDR_marb_foo_rw_dma7_burst 560 190 #define REG_WR_ADDR_marb_foo_rw_dma7_burst 560 191 192 /* Register rw_dma9_burst, scope marb_foo, type rw */ 193 typedef struct { 194 unsigned int intm_bsize : 2; 195 unsigned int l2_bsize : 2; 196 unsigned int dummy1 : 28; 197 } reg_marb_foo_rw_dma9_burst; 198 #define REG_RD_ADDR_marb_foo_rw_dma9_burst 564 199 #define REG_WR_ADDR_marb_foo_rw_dma9_burst 564 200 201 /* Register rw_dma11_burst, scope marb_foo, type rw */ 202 typedef struct { 203 unsigned int intm_bsize : 2; 204 unsigned int l2_bsize : 2; 205 unsigned int dummy1 : 28; 206 } reg_marb_foo_rw_dma11_burst; 207 #define REG_RD_ADDR_marb_foo_rw_dma11_burst 568 208 #define REG_WR_ADDR_marb_foo_rw_dma11_burst 568 209 210 /* Register rw_cpui_burst, scope marb_foo, type rw */ 211 typedef struct { 212 unsigned int intm_bsize : 2; 213 unsigned int l2_bsize : 2; 214 unsigned int dummy1 : 28; 215 } reg_marb_foo_rw_cpui_burst; 216 #define REG_RD_ADDR_marb_foo_rw_cpui_burst 572 217 #define REG_WR_ADDR_marb_foo_rw_cpui_burst 572 218 219 /* Register rw_cpud_burst, scope marb_foo, type rw */ 220 typedef struct { 221 unsigned int intm_bsize : 2; 222 unsigned int l2_bsize : 2; 223 unsigned int dummy1 : 28; 224 } reg_marb_foo_rw_cpud_burst; 225 #define REG_RD_ADDR_marb_foo_rw_cpud_burst 576 226 #define REG_WR_ADDR_marb_foo_rw_cpud_burst 576 227 228 /* Register rw_iop_burst, scope marb_foo, type rw */ 229 typedef struct { 230 unsigned int intm_bsize : 2; 231 unsigned int l2_bsize : 2; 232 unsigned int dummy1 : 28; 233 } reg_marb_foo_rw_iop_burst; 234 #define REG_RD_ADDR_marb_foo_rw_iop_burst 580 235 #define REG_WR_ADDR_marb_foo_rw_iop_burst 580 236 237 /* Register rw_ccdstat_burst, scope marb_foo, type rw */ 238 typedef struct { 239 unsigned int intm_bsize : 2; 240 unsigned int l2_bsize : 2; 241 unsigned int dummy1 : 28; 242 } reg_marb_foo_rw_ccdstat_burst; 243 #define REG_RD_ADDR_marb_foo_rw_ccdstat_burst 584 244 #define REG_WR_ADDR_marb_foo_rw_ccdstat_burst 584 245 246 /* Register rw_intr_mask, scope marb_foo, type rw */ 247 typedef struct { 248 unsigned int bp0 : 1; 249 unsigned int bp1 : 1; 250 unsigned int bp2 : 1; 251 unsigned int bp3 : 1; 252 unsigned int dummy1 : 28; 253 } reg_marb_foo_rw_intr_mask; 254 #define REG_RD_ADDR_marb_foo_rw_intr_mask 588 255 #define REG_WR_ADDR_marb_foo_rw_intr_mask 588 256 257 /* Register rw_ack_intr, scope marb_foo, type rw */ 258 typedef struct { 259 unsigned int bp0 : 1; 260 unsigned int bp1 : 1; 261 unsigned int bp2 : 1; 262 unsigned int bp3 : 1; 263 unsigned int dummy1 : 28; 264 } reg_marb_foo_rw_ack_intr; 265 #define REG_RD_ADDR_marb_foo_rw_ack_intr 592 266 #define REG_WR_ADDR_marb_foo_rw_ack_intr 592 267 268 /* Register r_intr, scope marb_foo, type r */ 269 typedef struct { 270 unsigned int bp0 : 1; 271 unsigned int bp1 : 1; 272 unsigned int bp2 : 1; 273 unsigned int bp3 : 1; 274 unsigned int dummy1 : 28; 275 } reg_marb_foo_r_intr; 276 #define REG_RD_ADDR_marb_foo_r_intr 596 277 278 /* Register r_masked_intr, scope marb_foo, type r */ 279 typedef struct { 280 unsigned int bp0 : 1; 281 unsigned int bp1 : 1; 282 unsigned int bp2 : 1; 283 unsigned int bp3 : 1; 284 unsigned int dummy1 : 28; 285 } reg_marb_foo_r_masked_intr; 286 #define REG_RD_ADDR_marb_foo_r_masked_intr 600 287 288 /* Register rw_stop_mask, scope marb_foo, type rw */ 289 typedef struct { 290 unsigned int sclr : 1; 291 unsigned int dma0 : 1; 292 unsigned int dma1 : 1; 293 unsigned int dma2 : 1; 294 unsigned int dma3 : 1; 295 unsigned int dma4 : 1; 296 unsigned int dma5 : 1; 297 unsigned int dma6 : 1; 298 unsigned int dma7 : 1; 299 unsigned int dma9 : 1; 300 unsigned int dma11 : 1; 301 unsigned int cpui : 1; 302 unsigned int cpud : 1; 303 unsigned int iop : 1; 304 unsigned int ccdstat : 1; 305 unsigned int dummy1 : 17; 306 } reg_marb_foo_rw_stop_mask; 307 #define REG_RD_ADDR_marb_foo_rw_stop_mask 604 308 #define REG_WR_ADDR_marb_foo_rw_stop_mask 604 309 310 /* Register r_stopped, scope marb_foo, type r */ 311 typedef struct { 312 unsigned int sclr : 1; 313 unsigned int dma0 : 1; 314 unsigned int dma1 : 1; 315 unsigned int dma2 : 1; 316 unsigned int dma3 : 1; 317 unsigned int dma4 : 1; 318 unsigned int dma5 : 1; 319 unsigned int dma6 : 1; 320 unsigned int dma7 : 1; 321 unsigned int dma9 : 1; 322 unsigned int dma11 : 1; 323 unsigned int cpui : 1; 324 unsigned int cpud : 1; 325 unsigned int iop : 1; 326 unsigned int ccdstat : 1; 327 unsigned int dummy1 : 17; 328 } reg_marb_foo_r_stopped; 329 #define REG_RD_ADDR_marb_foo_r_stopped 608 330 331 /* Register rw_no_snoop, scope marb_foo, type rw */ 332 typedef struct { 333 unsigned int sclr : 1; 334 unsigned int dma0 : 1; 335 unsigned int dma1 : 1; 336 unsigned int dma2 : 1; 337 unsigned int dma3 : 1; 338 unsigned int dma4 : 1; 339 unsigned int dma5 : 1; 340 unsigned int dma6 : 1; 341 unsigned int dma7 : 1; 342 unsigned int dma9 : 1; 343 unsigned int dma11 : 1; 344 unsigned int cpui : 1; 345 unsigned int cpud : 1; 346 unsigned int iop : 1; 347 unsigned int ccdstat : 1; 348 unsigned int dummy1 : 17; 349 } reg_marb_foo_rw_no_snoop; 350 #define REG_RD_ADDR_marb_foo_rw_no_snoop 896 351 #define REG_WR_ADDR_marb_foo_rw_no_snoop 896 352 353 /* Register rw_no_snoop_rq, scope marb_foo, type rw */ 354 typedef struct { 355 unsigned int dummy1 : 11; 356 unsigned int cpui : 1; 357 unsigned int cpud : 1; 358 unsigned int dummy2 : 19; 359 } reg_marb_foo_rw_no_snoop_rq; 360 #define REG_RD_ADDR_marb_foo_rw_no_snoop_rq 900 361 #define REG_WR_ADDR_marb_foo_rw_no_snoop_rq 900 362 363 364 /* Constants */ 365 enum { 366 regk_marb_foo_ccdstat = 0x0000000e, 367 regk_marb_foo_cpud = 0x0000000c, 368 regk_marb_foo_cpui = 0x0000000b, 369 regk_marb_foo_dma0 = 0x00000001, 370 regk_marb_foo_dma1 = 0x00000002, 371 regk_marb_foo_dma11 = 0x0000000a, 372 regk_marb_foo_dma2 = 0x00000003, 373 regk_marb_foo_dma3 = 0x00000004, 374 regk_marb_foo_dma4 = 0x00000005, 375 regk_marb_foo_dma5 = 0x00000006, 376 regk_marb_foo_dma6 = 0x00000007, 377 regk_marb_foo_dma7 = 0x00000008, 378 regk_marb_foo_dma9 = 0x00000009, 379 regk_marb_foo_iop = 0x0000000d, 380 regk_marb_foo_no = 0x00000000, 381 regk_marb_foo_r_stopped_default = 0x00000000, 382 regk_marb_foo_rw_ccdstat_burst_default = 0x00000000, 383 regk_marb_foo_rw_cpud_burst_default = 0x00000000, 384 regk_marb_foo_rw_cpui_burst_default = 0x00000000, 385 regk_marb_foo_rw_dma0_burst_default = 0x00000000, 386 regk_marb_foo_rw_dma11_burst_default = 0x00000000, 387 regk_marb_foo_rw_dma1_burst_default = 0x00000000, 388 regk_marb_foo_rw_dma2_burst_default = 0x00000000, 389 regk_marb_foo_rw_dma3_burst_default = 0x00000000, 390 regk_marb_foo_rw_dma4_burst_default = 0x00000000, 391 regk_marb_foo_rw_dma5_burst_default = 0x00000000, 392 regk_marb_foo_rw_dma6_burst_default = 0x00000000, 393 regk_marb_foo_rw_dma7_burst_default = 0x00000000, 394 regk_marb_foo_rw_dma9_burst_default = 0x00000000, 395 regk_marb_foo_rw_intm_slots_default = 0x00000000, 396 regk_marb_foo_rw_intm_slots_size = 0x00000040, 397 regk_marb_foo_rw_intr_mask_default = 0x00000000, 398 regk_marb_foo_rw_iop_burst_default = 0x00000000, 399 regk_marb_foo_rw_l2_slots_default = 0x00000000, 400 regk_marb_foo_rw_l2_slots_size = 0x00000040, 401 regk_marb_foo_rw_no_snoop_default = 0x00000000, 402 regk_marb_foo_rw_no_snoop_rq_default = 0x00000000, 403 regk_marb_foo_rw_regs_slots_default = 0x00000000, 404 regk_marb_foo_rw_regs_slots_size = 0x00000004, 405 regk_marb_foo_rw_sclr_burst_default = 0x00000000, 406 regk_marb_foo_rw_stop_mask_default = 0x00000000, 407 regk_marb_foo_sclr = 0x00000000, 408 regk_marb_foo_yes = 0x00000001 409 }; 410 #endif /* __marb_foo_defs_h */ 411 #ifndef __marb_foo_bp_defs_h 412 #define __marb_foo_bp_defs_h 413 414 /* 415 * This file is autogenerated from 416 * file: marb_foo.r 417 * 418 * by ../../../tools/rdesc/bin/rdes2c -outfile marb_foo_defs.h marb_foo.r 419 * Any changes here will be lost. 420 * 421 * -*- buffer-read-only: t -*- 422 */ 423 /* Main access macros */ 424 #ifndef REG_RD 425 #define REG_RD( scope, inst, reg ) \ 426 REG_READ( reg_##scope##_##reg, \ 427 (inst) + REG_RD_ADDR_##scope##_##reg ) 428 #endif 429 430 #ifndef REG_WR 431 #define REG_WR( scope, inst, reg, val ) \ 432 REG_WRITE( reg_##scope##_##reg, \ 433 (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) 434 #endif 435 436 #ifndef REG_RD_VECT 437 #define REG_RD_VECT( scope, inst, reg, index ) \ 438 REG_READ( reg_##scope##_##reg, \ 439 (inst) + REG_RD_ADDR_##scope##_##reg + \ 440 (index) * STRIDE_##scope##_##reg ) 441 #endif 442 443 #ifndef REG_WR_VECT 444 #define REG_WR_VECT( scope, inst, reg, index, val ) \ 445 REG_WRITE( reg_##scope##_##reg, \ 446 (inst) + REG_WR_ADDR_##scope##_##reg + \ 447 (index) * STRIDE_##scope##_##reg, (val) ) 448 #endif 449 450 #ifndef REG_RD_INT 451 #define REG_RD_INT( scope, inst, reg ) \ 452 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg ) 453 #endif 454 455 #ifndef REG_WR_INT 456 #define REG_WR_INT( scope, inst, reg, val ) \ 457 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) ) 458 #endif 459 460 #ifndef REG_RD_INT_VECT 461 #define REG_RD_INT_VECT( scope, inst, reg, index ) \ 462 REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \ 463 (index) * STRIDE_##scope##_##reg ) 464 #endif 465 466 #ifndef REG_WR_INT_VECT 467 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ 468 REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \ 469 (index) * STRIDE_##scope##_##reg, (val) ) 470 #endif 471 472 #ifndef REG_TYPE_CONV 473 #define REG_TYPE_CONV( type, orgtype, val ) \ 474 ( { union { orgtype o; type n; } r; r.o = val; r.n; } ) 475 #endif 476 477 #ifndef reg_page_size 478 #define reg_page_size 8192 479 #endif 480 481 #ifndef REG_ADDR 482 #define REG_ADDR( scope, inst, reg ) \ 483 ( (inst) + REG_RD_ADDR_##scope##_##reg ) 484 #endif 485 486 #ifndef REG_ADDR_VECT 487 #define REG_ADDR_VECT( scope, inst, reg, index ) \ 488 ( (inst) + REG_RD_ADDR_##scope##_##reg + \ 489 (index) * STRIDE_##scope##_##reg ) 490 #endif 491 492 /* C-code for register scope marb_foo_bp */ 493 494 /* Register rw_first_addr, scope marb_foo_bp, type rw */ 495 typedef unsigned int reg_marb_foo_bp_rw_first_addr; 496 #define REG_RD_ADDR_marb_foo_bp_rw_first_addr 0 497 #define REG_WR_ADDR_marb_foo_bp_rw_first_addr 0 498 499 /* Register rw_last_addr, scope marb_foo_bp, type rw */ 500 typedef unsigned int reg_marb_foo_bp_rw_last_addr; 501 #define REG_RD_ADDR_marb_foo_bp_rw_last_addr 4 502 #define REG_WR_ADDR_marb_foo_bp_rw_last_addr 4 503 504 /* Register rw_op, scope marb_foo_bp, type rw */ 505 typedef struct { 506 unsigned int rd : 1; 507 unsigned int wr : 1; 508 unsigned int rd_excl : 1; 509 unsigned int pri_wr : 1; 510 unsigned int us_rd : 1; 511 unsigned int us_wr : 1; 512 unsigned int us_rd_excl : 1; 513 unsigned int us_pri_wr : 1; 514 unsigned int dummy1 : 24; 515 } reg_marb_foo_bp_rw_op; 516 #define REG_RD_ADDR_marb_foo_bp_rw_op 8 517 #define REG_WR_ADDR_marb_foo_bp_rw_op 8 518 519 /* Register rw_clients, scope marb_foo_bp, type rw */ 520 typedef struct { 521 unsigned int sclr : 1; 522 unsigned int dma0 : 1; 523 unsigned int dma1 : 1; 524 unsigned int dma2 : 1; 525 unsigned int dma3 : 1; 526 unsigned int dma4 : 1; 527 unsigned int dma5 : 1; 528 unsigned int dma6 : 1; 529 unsigned int dma7 : 1; 530 unsigned int dma9 : 1; 531 unsigned int dma11 : 1; 532 unsigned int cpui : 1; 533 unsigned int cpud : 1; 534 unsigned int iop : 1; 535 unsigned int ccdstat : 1; 536 unsigned int dummy1 : 17; 537 } reg_marb_foo_bp_rw_clients; 538 #define REG_RD_ADDR_marb_foo_bp_rw_clients 12 539 #define REG_WR_ADDR_marb_foo_bp_rw_clients 12 540 541 /* Register rw_options, scope marb_foo_bp, type rw */ 542 typedef struct { 543 unsigned int wrap : 1; 544 unsigned int dummy1 : 31; 545 } reg_marb_foo_bp_rw_options; 546 #define REG_RD_ADDR_marb_foo_bp_rw_options 16 547 #define REG_WR_ADDR_marb_foo_bp_rw_options 16 548 549 /* Register r_brk_addr, scope marb_foo_bp, type r */ 550 typedef unsigned int reg_marb_foo_bp_r_brk_addr; 551 #define REG_RD_ADDR_marb_foo_bp_r_brk_addr 20 552 553 /* Register r_brk_op, scope marb_foo_bp, type r */ 554 typedef struct { 555 unsigned int rd : 1; 556 unsigned int wr : 1; 557 unsigned int rd_excl : 1; 558 unsigned int pri_wr : 1; 559 unsigned int us_rd : 1; 560 unsigned int us_wr : 1; 561 unsigned int us_rd_excl : 1; 562 unsigned int us_pri_wr : 1; 563 unsigned int dummy1 : 24; 564 } reg_marb_foo_bp_r_brk_op; 565 #define REG_RD_ADDR_marb_foo_bp_r_brk_op 24 566 567 /* Register r_brk_clients, scope marb_foo_bp, type r */ 568 typedef struct { 569 unsigned int sclr : 1; 570 unsigned int dma0 : 1; 571 unsigned int dma1 : 1; 572 unsigned int dma2 : 1; 573 unsigned int dma3 : 1; 574 unsigned int dma4 : 1; 575 unsigned int dma5 : 1; 576 unsigned int dma6 : 1; 577 unsigned int dma7 : 1; 578 unsigned int dma9 : 1; 579 unsigned int dma11 : 1; 580 unsigned int cpui : 1; 581 unsigned int cpud : 1; 582 unsigned int iop : 1; 583 unsigned int ccdstat : 1; 584 unsigned int dummy1 : 17; 585 } reg_marb_foo_bp_r_brk_clients; 586 #define REG_RD_ADDR_marb_foo_bp_r_brk_clients 28 587 588 /* Register r_brk_first_client, scope marb_foo_bp, type r */ 589 typedef struct { 590 unsigned int sclr : 1; 591 unsigned int dma0 : 1; 592 unsigned int dma1 : 1; 593 unsigned int dma2 : 1; 594 unsigned int dma3 : 1; 595 unsigned int dma4 : 1; 596 unsigned int dma5 : 1; 597 unsigned int dma6 : 1; 598 unsigned int dma7 : 1; 599 unsigned int dma9 : 1; 600 unsigned int dma11 : 1; 601 unsigned int cpui : 1; 602 unsigned int cpud : 1; 603 unsigned int iop : 1; 604 unsigned int ccdstat : 1; 605 unsigned int dummy1 : 17; 606 } reg_marb_foo_bp_r_brk_first_client; 607 #define REG_RD_ADDR_marb_foo_bp_r_brk_first_client 32 608 609 /* Register r_brk_size, scope marb_foo_bp, type r */ 610 typedef unsigned int reg_marb_foo_bp_r_brk_size; 611 #define REG_RD_ADDR_marb_foo_bp_r_brk_size 36 612 613 /* Register rw_ack, scope marb_foo_bp, type rw */ 614 typedef unsigned int reg_marb_foo_bp_rw_ack; 615 #define REG_RD_ADDR_marb_foo_bp_rw_ack 40 616 #define REG_WR_ADDR_marb_foo_bp_rw_ack 40 617 618 619 /* Constants */ 620 enum { 621 regk_marb_foo_bp_no = 0x00000000, 622 regk_marb_foo_bp_rw_op_default = 0x00000000, 623 regk_marb_foo_bp_rw_options_default = 0x00000000, 624 regk_marb_foo_bp_yes = 0x00000001 625 }; 626 #endif /* __marb_foo_bp_defs_h */ 627