1 #include <linux/threads.h>
2 #include <linux/cpumask.h>
3 #include <linux/string.h>
4 #include <linux/kernel.h>
5 #include <linux/ctype.h>
6 #include <linux/dmar.h>
7
8 #include <asm/smp.h>
9 #include <asm/x2apic.h>
10
11 int x2apic_phys;
12
13 static struct apic apic_x2apic_phys;
14
set_x2apic_phys_mode(char * arg)15 static int set_x2apic_phys_mode(char *arg)
16 {
17 x2apic_phys = 1;
18 return 0;
19 }
20 early_param("x2apic_phys", set_x2apic_phys_mode);
21
x2apic_fadt_phys(void)22 static bool x2apic_fadt_phys(void)
23 {
24 if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) &&
25 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
26 printk(KERN_DEBUG "System requires x2apic physical mode\n");
27 return true;
28 }
29 return false;
30 }
31
x2apic_acpi_madt_oem_check(char * oem_id,char * oem_table_id)32 static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
33 {
34 return x2apic_enabled() && (x2apic_phys || x2apic_fadt_phys());
35 }
36
37 static void
__x2apic_send_IPI_mask(const struct cpumask * mask,int vector,int apic_dest)38 __x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
39 {
40 unsigned long query_cpu;
41 unsigned long this_cpu;
42 unsigned long flags;
43
44 x2apic_wrmsr_fence();
45
46 local_irq_save(flags);
47
48 this_cpu = smp_processor_id();
49 for_each_cpu(query_cpu, mask) {
50 if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu)
51 continue;
52 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
53 vector, APIC_DEST_PHYSICAL);
54 }
55 local_irq_restore(flags);
56 }
57
x2apic_send_IPI_mask(const struct cpumask * mask,int vector)58 static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
59 {
60 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
61 }
62
63 static void
x2apic_send_IPI_mask_allbutself(const struct cpumask * mask,int vector)64 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
65 {
66 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
67 }
68
x2apic_send_IPI_allbutself(int vector)69 static void x2apic_send_IPI_allbutself(int vector)
70 {
71 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
72 }
73
x2apic_send_IPI_all(int vector)74 static void x2apic_send_IPI_all(int vector)
75 {
76 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
77 }
78
init_x2apic_ldr(void)79 static void init_x2apic_ldr(void)
80 {
81 }
82
x2apic_phys_probe(void)83 static int x2apic_phys_probe(void)
84 {
85 if (x2apic_mode && (x2apic_phys || x2apic_fadt_phys()))
86 return 1;
87
88 return apic == &apic_x2apic_phys;
89 }
90
91 static struct apic apic_x2apic_phys = {
92
93 .name = "physical x2apic",
94 .probe = x2apic_phys_probe,
95 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
96 .apic_id_valid = x2apic_apic_id_valid,
97 .apic_id_registered = x2apic_apic_id_registered,
98
99 .irq_delivery_mode = dest_Fixed,
100 .irq_dest_mode = 0, /* physical */
101
102 .target_cpus = online_target_cpus,
103 .disable_esr = 0,
104 .dest_logical = 0,
105 .check_apicid_used = NULL,
106
107 .vector_allocation_domain = default_vector_allocation_domain,
108 .init_apic_ldr = init_x2apic_ldr,
109
110 .ioapic_phys_id_map = NULL,
111 .setup_apic_routing = NULL,
112 .cpu_present_to_apicid = default_cpu_present_to_apicid,
113 .apicid_to_cpu_present = NULL,
114 .check_phys_apicid_present = default_check_phys_apicid_present,
115 .phys_pkg_id = x2apic_phys_pkg_id,
116
117 .get_apic_id = x2apic_get_apic_id,
118 .set_apic_id = x2apic_set_apic_id,
119 .apic_id_mask = 0xFFFFFFFFu,
120
121 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
122
123 .send_IPI_mask = x2apic_send_IPI_mask,
124 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
125 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
126 .send_IPI_all = x2apic_send_IPI_all,
127 .send_IPI_self = x2apic_send_IPI_self,
128
129 .wait_for_init_deassert = false,
130 .inquire_remote_apic = NULL,
131
132 .read = native_apic_msr_read,
133 .write = native_apic_msr_write,
134 .eoi_write = native_apic_msr_eoi_write,
135 .icr_read = native_x2apic_icr_read,
136 .icr_write = native_x2apic_icr_write,
137 .wait_icr_idle = native_x2apic_wait_icr_idle,
138 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
139 };
140
141 apic_driver(apic_x2apic_phys);
142