1/* 2 * SoC core Device Tree for the ARM Integrator platforms 3 */ 4 5/include/ "skeleton.dtsi" 6 7/ { 8 core-module@10000000 { 9 compatible = "arm,core-module-integrator"; 10 reg = <0x10000000 0x200>; 11 }; 12 13 ebi@12000000 { 14 compatible = "arm,external-bus-interface"; 15 reg = <0x12000000 0x100>; 16 }; 17 18 timer@13000000 { 19 reg = <0x13000000 0x100>; 20 interrupt-parent = <&pic>; 21 interrupts = <5>; 22 }; 23 24 timer@13000100 { 25 reg = <0x13000100 0x100>; 26 interrupt-parent = <&pic>; 27 interrupts = <6>; 28 }; 29 30 timer@13000200 { 31 reg = <0x13000200 0x100>; 32 interrupt-parent = <&pic>; 33 interrupts = <7>; 34 }; 35 36 pic@14000000 { 37 compatible = "arm,versatile-fpga-irq"; 38 #interrupt-cells = <1>; 39 interrupt-controller; 40 reg = <0x14000000 0x100>; 41 clear-mask = <0xffffffff>; 42 }; 43 44 flash@24000000 { 45 compatible = "cfi-flash"; 46 reg = <0x24000000 0x02000000>; 47 }; 48 49 fpga { 50 compatible = "arm,amba-bus", "simple-bus"; 51 #address-cells = <1>; 52 #size-cells = <1>; 53 ranges; 54 interrupt-parent = <&pic>; 55 56 /* 57 * These PrimeCells are in the same locations and using the 58 * same interrupts in all Integrators, however the silicon 59 * version deployed is different. 60 */ 61 rtc@15000000 { 62 reg = <0x15000000 0x1000>; 63 interrupts = <8>; 64 }; 65 66 uart@16000000 { 67 reg = <0x16000000 0x1000>; 68 interrupts = <1>; 69 }; 70 71 uart@17000000 { 72 reg = <0x17000000 0x1000>; 73 interrupts = <2>; 74 }; 75 76 kmi@18000000 { 77 reg = <0x18000000 0x1000>; 78 interrupts = <3>; 79 }; 80 81 kmi@19000000 { 82 reg = <0x19000000 0x1000>; 83 interrupts = <4>; 84 }; 85 }; 86}; 87