1 /*
2 * Broadcom specific AMBA
3 * PCI Host
4 *
5 * Licensed under the GNU/GPL. See COPYING for details.
6 */
7
8 #include "bcma_private.h"
9 #include <linux/slab.h>
10 #include <linux/bcma/bcma.h>
11 #include <linux/pci.h>
12 #include <linux/module.h>
13
bcma_host_pci_switch_core(struct bcma_device * core)14 static void bcma_host_pci_switch_core(struct bcma_device *core)
15 {
16 pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN,
17 core->addr);
18 pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN2,
19 core->wrap);
20 core->bus->mapped_core = core;
21 bcma_debug(core->bus, "Switched to core: 0x%X\n", core->id.id);
22 }
23
24 /* Provides access to the requested core. Returns base offset that has to be
25 * used. It makes use of fixed windows when possible. */
bcma_host_pci_provide_access_to_core(struct bcma_device * core)26 static u16 bcma_host_pci_provide_access_to_core(struct bcma_device *core)
27 {
28 switch (core->id.id) {
29 case BCMA_CORE_CHIPCOMMON:
30 return 3 * BCMA_CORE_SIZE;
31 case BCMA_CORE_PCIE:
32 return 2 * BCMA_CORE_SIZE;
33 }
34
35 if (core->bus->mapped_core != core)
36 bcma_host_pci_switch_core(core);
37 return 0;
38 }
39
bcma_host_pci_read8(struct bcma_device * core,u16 offset)40 static u8 bcma_host_pci_read8(struct bcma_device *core, u16 offset)
41 {
42 offset += bcma_host_pci_provide_access_to_core(core);
43 return ioread8(core->bus->mmio + offset);
44 }
45
bcma_host_pci_read16(struct bcma_device * core,u16 offset)46 static u16 bcma_host_pci_read16(struct bcma_device *core, u16 offset)
47 {
48 offset += bcma_host_pci_provide_access_to_core(core);
49 return ioread16(core->bus->mmio + offset);
50 }
51
bcma_host_pci_read32(struct bcma_device * core,u16 offset)52 static u32 bcma_host_pci_read32(struct bcma_device *core, u16 offset)
53 {
54 offset += bcma_host_pci_provide_access_to_core(core);
55 return ioread32(core->bus->mmio + offset);
56 }
57
bcma_host_pci_write8(struct bcma_device * core,u16 offset,u8 value)58 static void bcma_host_pci_write8(struct bcma_device *core, u16 offset,
59 u8 value)
60 {
61 offset += bcma_host_pci_provide_access_to_core(core);
62 iowrite8(value, core->bus->mmio + offset);
63 }
64
bcma_host_pci_write16(struct bcma_device * core,u16 offset,u16 value)65 static void bcma_host_pci_write16(struct bcma_device *core, u16 offset,
66 u16 value)
67 {
68 offset += bcma_host_pci_provide_access_to_core(core);
69 iowrite16(value, core->bus->mmio + offset);
70 }
71
bcma_host_pci_write32(struct bcma_device * core,u16 offset,u32 value)72 static void bcma_host_pci_write32(struct bcma_device *core, u16 offset,
73 u32 value)
74 {
75 offset += bcma_host_pci_provide_access_to_core(core);
76 iowrite32(value, core->bus->mmio + offset);
77 }
78
79 #ifdef CONFIG_BCMA_BLOCKIO
bcma_host_pci_block_read(struct bcma_device * core,void * buffer,size_t count,u16 offset,u8 reg_width)80 static void bcma_host_pci_block_read(struct bcma_device *core, void *buffer,
81 size_t count, u16 offset, u8 reg_width)
82 {
83 void __iomem *addr = core->bus->mmio + offset;
84 if (core->bus->mapped_core != core)
85 bcma_host_pci_switch_core(core);
86 switch (reg_width) {
87 case sizeof(u8):
88 ioread8_rep(addr, buffer, count);
89 break;
90 case sizeof(u16):
91 WARN_ON(count & 1);
92 ioread16_rep(addr, buffer, count >> 1);
93 break;
94 case sizeof(u32):
95 WARN_ON(count & 3);
96 ioread32_rep(addr, buffer, count >> 2);
97 break;
98 default:
99 WARN_ON(1);
100 }
101 }
102
bcma_host_pci_block_write(struct bcma_device * core,const void * buffer,size_t count,u16 offset,u8 reg_width)103 static void bcma_host_pci_block_write(struct bcma_device *core,
104 const void *buffer, size_t count,
105 u16 offset, u8 reg_width)
106 {
107 void __iomem *addr = core->bus->mmio + offset;
108 if (core->bus->mapped_core != core)
109 bcma_host_pci_switch_core(core);
110 switch (reg_width) {
111 case sizeof(u8):
112 iowrite8_rep(addr, buffer, count);
113 break;
114 case sizeof(u16):
115 WARN_ON(count & 1);
116 iowrite16_rep(addr, buffer, count >> 1);
117 break;
118 case sizeof(u32):
119 WARN_ON(count & 3);
120 iowrite32_rep(addr, buffer, count >> 2);
121 break;
122 default:
123 WARN_ON(1);
124 }
125 }
126 #endif
127
bcma_host_pci_aread32(struct bcma_device * core,u16 offset)128 static u32 bcma_host_pci_aread32(struct bcma_device *core, u16 offset)
129 {
130 if (core->bus->mapped_core != core)
131 bcma_host_pci_switch_core(core);
132 return ioread32(core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
133 }
134
bcma_host_pci_awrite32(struct bcma_device * core,u16 offset,u32 value)135 static void bcma_host_pci_awrite32(struct bcma_device *core, u16 offset,
136 u32 value)
137 {
138 if (core->bus->mapped_core != core)
139 bcma_host_pci_switch_core(core);
140 iowrite32(value, core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
141 }
142
143 static const struct bcma_host_ops bcma_host_pci_ops = {
144 .read8 = bcma_host_pci_read8,
145 .read16 = bcma_host_pci_read16,
146 .read32 = bcma_host_pci_read32,
147 .write8 = bcma_host_pci_write8,
148 .write16 = bcma_host_pci_write16,
149 .write32 = bcma_host_pci_write32,
150 #ifdef CONFIG_BCMA_BLOCKIO
151 .block_read = bcma_host_pci_block_read,
152 .block_write = bcma_host_pci_block_write,
153 #endif
154 .aread32 = bcma_host_pci_aread32,
155 .awrite32 = bcma_host_pci_awrite32,
156 };
157
bcma_host_pci_probe(struct pci_dev * dev,const struct pci_device_id * id)158 static int bcma_host_pci_probe(struct pci_dev *dev,
159 const struct pci_device_id *id)
160 {
161 struct bcma_bus *bus;
162 int err = -ENOMEM;
163 const char *name;
164 u32 val;
165
166 /* Alloc */
167 bus = kzalloc(sizeof(*bus), GFP_KERNEL);
168 if (!bus)
169 goto out;
170
171 /* Basic PCI configuration */
172 err = pci_enable_device(dev);
173 if (err)
174 goto err_kfree_bus;
175
176 name = dev_name(&dev->dev);
177 if (dev->driver && dev->driver->name)
178 name = dev->driver->name;
179 err = pci_request_regions(dev, name);
180 if (err)
181 goto err_pci_disable;
182 pci_set_master(dev);
183
184 /* Disable the RETRY_TIMEOUT register (0x41) to keep
185 * PCI Tx retries from interfering with C3 CPU state */
186 pci_read_config_dword(dev, 0x40, &val);
187 if ((val & 0x0000ff00) != 0)
188 pci_write_config_dword(dev, 0x40, val & 0xffff00ff);
189
190 /* SSB needed additional powering up, do we have any AMBA PCI cards? */
191 if (!pci_is_pcie(dev)) {
192 bcma_err(bus, "PCI card detected, they are not supported.\n");
193 err = -ENXIO;
194 goto err_pci_release_regions;
195 }
196
197 /* Map MMIO */
198 err = -ENOMEM;
199 bus->mmio = pci_iomap(dev, 0, ~0UL);
200 if (!bus->mmio)
201 goto err_pci_release_regions;
202
203 /* Host specific */
204 bus->host_pci = dev;
205 bus->hosttype = BCMA_HOSTTYPE_PCI;
206 bus->ops = &bcma_host_pci_ops;
207
208 bus->boardinfo.vendor = bus->host_pci->subsystem_vendor;
209 bus->boardinfo.type = bus->host_pci->subsystem_device;
210
211 /* Initialize struct, detect chip */
212 bcma_init_bus(bus);
213
214 /* Register */
215 err = bcma_bus_register(bus);
216 if (err)
217 goto err_pci_unmap_mmio;
218
219 pci_set_drvdata(dev, bus);
220
221 out:
222 return err;
223
224 err_pci_unmap_mmio:
225 pci_iounmap(dev, bus->mmio);
226 err_pci_release_regions:
227 pci_release_regions(dev);
228 err_pci_disable:
229 pci_disable_device(dev);
230 err_kfree_bus:
231 kfree(bus);
232 return err;
233 }
234
bcma_host_pci_remove(struct pci_dev * dev)235 static void bcma_host_pci_remove(struct pci_dev *dev)
236 {
237 struct bcma_bus *bus = pci_get_drvdata(dev);
238
239 bcma_bus_unregister(bus);
240 pci_iounmap(dev, bus->mmio);
241 pci_release_regions(dev);
242 pci_disable_device(dev);
243 kfree(bus);
244 }
245
246 #ifdef CONFIG_PM_SLEEP
bcma_host_pci_suspend(struct device * dev)247 static int bcma_host_pci_suspend(struct device *dev)
248 {
249 struct pci_dev *pdev = to_pci_dev(dev);
250 struct bcma_bus *bus = pci_get_drvdata(pdev);
251
252 bus->mapped_core = NULL;
253
254 return bcma_bus_suspend(bus);
255 }
256
bcma_host_pci_resume(struct device * dev)257 static int bcma_host_pci_resume(struct device *dev)
258 {
259 struct pci_dev *pdev = to_pci_dev(dev);
260 struct bcma_bus *bus = pci_get_drvdata(pdev);
261
262 return bcma_bus_resume(bus);
263 }
264
265 static SIMPLE_DEV_PM_OPS(bcma_pm_ops, bcma_host_pci_suspend,
266 bcma_host_pci_resume);
267 #define BCMA_PM_OPS (&bcma_pm_ops)
268
269 #else /* CONFIG_PM_SLEEP */
270
271 #define BCMA_PM_OPS NULL
272
273 #endif /* CONFIG_PM_SLEEP */
274
275 static const struct pci_device_id bcma_pci_bridge_tbl[] = {
276 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x0576) },
277 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4313) },
278 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43224) }, /* 0xa8d8 */
279 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) },
280 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) },
281 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) },
282 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4358) },
283 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4359) },
284 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4365) },
285 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43a9) },
286 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43aa) },
287 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
288 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43227) }, /* 0xa8db, BCM43217 (sic!) */
289 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43228) }, /* 0xa8dc */
290 { 0, },
291 };
292 MODULE_DEVICE_TABLE(pci, bcma_pci_bridge_tbl);
293
294 static struct pci_driver bcma_pci_bridge_driver = {
295 .name = "bcma-pci-bridge",
296 .id_table = bcma_pci_bridge_tbl,
297 .probe = bcma_host_pci_probe,
298 .remove = bcma_host_pci_remove,
299 .driver.pm = BCMA_PM_OPS,
300 };
301
bcma_host_pci_init(void)302 int __init bcma_host_pci_init(void)
303 {
304 return pci_register_driver(&bcma_pci_bridge_driver);
305 }
306
bcma_host_pci_exit(void)307 void __exit bcma_host_pci_exit(void)
308 {
309 pci_unregister_driver(&bcma_pci_bridge_driver);
310 }
311