• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1/*
2 * Copyright 2014 Texas Instruments, Inc.
3 *
4 * Keystone 2 Lamarr SoC specific device tree
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11/ {
12	cpus {
13		#address-cells = <1>;
14		#size-cells = <0>;
15
16		interrupt-parent = <&gic>;
17
18		cpu@0 {
19			compatible = "arm,cortex-a15";
20			device_type = "cpu";
21			reg = <0>;
22		};
23
24		cpu@1 {
25			compatible = "arm,cortex-a15";
26			device_type = "cpu";
27			reg = <1>;
28		};
29	};
30
31	soc {
32
33		/include/ "k2l-clocks.dtsi"
34
35		uart2: serial@02348400 {
36			compatible = "ns16550a";
37			current-speed = <115200>;
38			reg-shift = <2>;
39			reg-io-width = <4>;
40			reg = <0x02348400 0x100>;
41			clocks	= <&clkuart2>;
42			interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>;
43		};
44
45		uart3:	serial@02348800 {
46			compatible = "ns16550a";
47			current-speed = <115200>;
48			reg-shift = <2>;
49			reg-io-width = <4>;
50			reg = <0x02348800 0x100>;
51			clocks	= <&clkuart3>;
52			interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>;
53		};
54
55		dspgpio0: keystone_dsp_gpio@02620240 {
56			compatible = "ti,keystone-dsp-gpio";
57			gpio-controller;
58			#gpio-cells = <2>;
59			gpio,syscon-dev = <&devctrl 0x240>;
60		};
61
62		dspgpio1: keystone_dsp_gpio@2620244 {
63			compatible = "ti,keystone-dsp-gpio";
64			gpio-controller;
65			#gpio-cells = <2>;
66			gpio,syscon-dev = <&devctrl 0x244>;
67		};
68
69		dspgpio2: keystone_dsp_gpio@2620248 {
70			compatible = "ti,keystone-dsp-gpio";
71			gpio-controller;
72			#gpio-cells = <2>;
73			gpio,syscon-dev = <&devctrl 0x248>;
74		};
75
76		dspgpio3: keystone_dsp_gpio@262024c {
77			compatible = "ti,keystone-dsp-gpio";
78			gpio-controller;
79			#gpio-cells = <2>;
80			gpio,syscon-dev = <&devctrl 0x24c>;
81		};
82	};
83};
84
85&spi0 {
86       ti,davinci-spi-num-cs = <5>;
87};
88
89&spi1 {
90       ti,davinci-spi-num-cs = <3>;
91};
92
93&spi2 {
94       ti,davinci-spi-num-cs = <5>;
95       /* Pin muxed. Enabled and configured by Bootloader */
96       status = "disabled";
97};
98
99&mdio {
100	reg = <0x26200f00 0x100>;
101};
102