/Documentation/devicetree/bindings/serial/ |
D | mrvl,pxa-ssp.txt | 16 - dmas: Two dma phandles, one for rx, one for tx 17 - dma-names: Must be "rx", "tx" 30 dma-names = "rx", "tx"; 41 dma-names = "rx", "tx"; 52 dma-names = "rx", "tx"; 63 dma-names = "rx", "tx";
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D | atmel-usart.txt | 14 - atmel,use-dma-rx: use of PDC or DMA for receiving data 23 - dma-names: "rx" for RX channel, "tx" for TX channel. 37 atmel,use-dma-rx; 54 atmel,use-dma-rx; 58 dma-names = "tx", "rx";
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/Documentation/devicetree/bindings/dma/ |
D | fsl-mxs-dma.txt | 41 interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty", 43 "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx", 44 "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx"; 59 dma-names = "rx", "tx";
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D | dma.txt | 64 dma-names = "rx", "tx"; 73 dma-names = "rx-tx", "rx-tx", "rx-tx"; 81 dma-names = "rx", "tx", "error", "error";
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/Documentation/devicetree/bindings/mailbox/ |
D | omap-mailbox.txt | 16 programmable through a set of interrupt configuration registers, and have a rx 18 is achieved through the appropriate programming of the rx and tx interrupt 60 - ti,mbox-rx: sub-mailbox descriptor property defining a Rx fifo 64 Each of the above ti,mbox-tx and ti,mbox-rx properties should have 3 cells of 67 (ti,mbox-tx) or for receiving (ti,mbox-rx) 73 associated with generating a tx/rx fifo interrupt. 88 ti,mbox-rx = <1 0 0>; 92 ti,mbox-rx = <2 0 0>; 106 ti,mbox-rx = <0 0 3>;
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/Documentation/devicetree/bindings/media/ |
D | st-rc.txt | 10 - rx-mode: can be "infrared" or "uhf". This property specifies the L1 11 protocol used for receiving remote control signals. rx-mode should 12 be present iff the rx pins are wired up. 28 rx-mode = "infrared";
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/Documentation/devicetree/bindings/sound/ |
D | davinci-mcasp-audio.txt | 26 identifiers must be "rx" and "tx". 32 - rx-num-evt : FIFO levels. 36 - interrupt-names : Known interrupt names are "tx" and "rx" 50 interrupt-names = "tx", "rx"; 59 rx-num-evt = <1>;
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D | mxs-saif.txt | 10 - dma-names: Must be "rx-tx". 31 dma-names = "rx-tx"; 39 dma-names = "rx-tx";
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D | fsl-sai.txt | 17 - dma-names : Two dmas have to be defined, "tx" and "rx". 26 - fsl,sai-synchronous-rx: This is a boolean property. If present, indicating 36 - If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the 40 - fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive. 52 dma-names = "tx", "rx";
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D | rockchip-i2s.txt | 17 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, 19 - dma-names: should include "tx" and "rx". 34 dma-names = "tx", "rx";
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/Documentation/devicetree/bindings/crypto/ |
D | qcom-qce.txt | 11 - dmas : DMA specifiers for tx and rx dma channels. For more see 13 - dma-names : DMA request names should be "rx" and "tx" 24 dma-names = "rx", "tx";
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D | omap-sham.txt | 15 - dmas: DMA specifiers for the rx dma. See the DMA client binding, 17 - dma-names: DMA request name. Should be "rx" if a dma is present. 27 dma-names = "rx";
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D | omap-aes.txt | 17 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, 19 - dma-names: DMA request names should include "tx" and "rx" if present. 30 dma-names = "tx", "rx";
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D | omap-des.txt | 14 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, 17 - dma-names: DMA request names should include "tx" and "rx" if present 27 dma-names = "tx", "rx";
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/Documentation/devicetree/bindings/spi/ |
D | fsl-imx-cspi.txt | 10 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, 12 - dma-names: DMA request names should include "tx" and "rx" if present. 26 dma-names = "rx", "tx";
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D | spi_pl022.txt | 22 least one channel named "tx" for transmit and named "rx" for 34 - pl022,rx-level-trig : Rx FIFO watermark level 51 dma-names = "rx", "tx"; 63 pl022,rx-level-trig = <0>;
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D | sh-msiof.txt | 32 - dma-names : Must contain a list of two DMA names, "tx" and "rx". 37 - renesas,rx-fifo-size : Overrides the default rx fifo size given in words 51 dma-names = "tx", "rx";
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D | spi-rspi.txt | 25 - "rx" for SPRI, 38 - dma-names : Must contain a list of two DMA names, "tx" and "rx". 51 interrupt-names = "error", "rx", "tx"; 68 dma-names = "tx", "rx";
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D | spi-rockchip.txt | 24 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, 26 - dma-names: DMA request names should include "tx" and "rx" if present. 35 dma-names = "tx", "rx";
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/Documentation/devicetree/bindings/powerpc/4xx/ |
D | emac.txt | 27 - mal-rx-channel : 1 cell, index of the rx channel on McMAL associated 33 - rx-fifo-size : 1 cell, Rx fifo size in bytes for 10 and 100 Mb/sec 74 - rx-fifo-size-gige : 1 cell, Rx fifo size in bytes for 1000 Mb/sec 76 rx-fifo-size). For Axon, either absent or 2048. 96 mal-rx-channel = <0>; 99 rx-fifo-size = <1000>; 126 - num-rx-chans : 1 cell, number of Rx channels
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/Documentation/networking/ |
D | cxgb.txt | 30 Adaptive Interrupts (adaptive-rx) 41 By default, adaptive-rx is disabled. 42 To enable adaptive-rx: 44 ethtool -C <interface> adaptive-rx on 46 To disable adaptive-rx, use ethtool: 48 ethtool -C <interface> adaptive-rx off 50 After disabling adaptive-rx, the timer latency value will be set to 50us. 51 You may set the timer latency after disabling adaptive-rx: 53 ethtool -C <interface> rx-usecs <microseconds> 57 ethtool -C eth0 rx-usecs 100 [all …]
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/Documentation/devicetree/bindings/net/can/ |
D | xilinx_can.txt | 18 - rx-fifo-depth : Can Rx fifo depth. 32 rx-fifo-depth = <0x40>; 43 rx-fifo-depth = <0x40>;
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/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/ |
D | ucc.txt | 24 - rx-clock-name: the UCC receive clock source 32 The following two properties are deprecated. rx-clock has been replaced 33 with rx-clock-name, and tx-clock has been replaced with tx-clock-name. 37 - rx-clock : represents the UCC receive clock source. 65 rx-clock = "none";
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/Documentation/devicetree/bindings/misc/ |
D | atmel-ssc.txt | 16 the memory interface and SSC DMA channel ID (for tx and rx). 18 - dma-names: Must be "tx", "rx". 45 dma-names = "tx", "rx";
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/Documentation/spi/ |
D | spidev_test.c | 50 uint8_t rx[ARRAY_SIZE(tx)] = {0, }; in transfer() local 53 .rx_buf = (unsigned long)rx, in transfer() 82 printf("%.2X ", rx[ret]); in transfer()
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