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Searched refs:ACCR_D0CS (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-pxa/
Dclock-pxa3xx.c26 #define ACCR_D0CS (1 << 26) macro
55 ro = acsr & ACCR_D0CS; in pxa3xx_get_clk_frequency_khz()
106 hsio_clk = (acsr & ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK; in clk_pxa3xx_hsio_getrate()
/arch/arm/mach-pxa/include/mach/
Dpxa3xx-regs.h139 #define ACCR_D0CS (1 << 26) /* D0 Mode Clock Select */ macro