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Searched refs:ARM_IDLECT2 (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-omap1/
Dpm.c155 omap_readl(ARM_IDLECT2)); in omap1_pm_idle()
279 ARM_SAVE(ARM_IDLECT2); in omap1_pm_suspend()
303 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); in omap1_pm_suspend()
357 omap_writew(omap_readw(ARM_IDLECT2) | 1 << EN_APICK, ARM_IDLECT2); in omap1_pm_suspend()
428 ARM_SAVE(ARM_IDLECT2); in omap_pm_debug_show()
483 ARM_SHOW(ARM_IDLECT2), in omap_pm_debug_show()
Dclock_data.c101 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
135 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
154 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
165 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
178 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
191 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
350 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
363 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
388 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
402 .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2),
[all …]
Dsleep.S92 @ load base address of ARM_IDLECT1 and ARM_IDLECT2
129 @ reset the ARM_IDLECT1 and ARM_IDLECT2.
177 @ load base address of ARM_IDLECT1 and ARM_IDLECT2
247 @ Load base address of ARM_IDLECT1 and ARM_IDLECT2
357 @ Restore the ARM_IDLECT1 and ARM_IDLECT2.
/arch/arm/mach-omap1/include/mach/
Dhardware.h109 #define ARM_IDLECT2 (CLKGEN_REG_BASE + 0x8) macro