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Searched refs:AT91_AIC_IDCR (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-at91/
Dirq.c90 at91_aic_write(AT91_AIC_IDCR, *backups); in at91_irq_suspend()
96 at91_aic_write(AT91_AIC_IDCR, *wakeups); in at91_irq_resume()
134 at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq); in at91_aic_mask_irq()
243 at91_aic_write(AT91_AIC_IDCR, 0xFFFFFFFF); in at91_aic_hw_init()
Dat91_aic.h74 #define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ macro