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Searched refs:BASE_CLK (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-pxa/
Dclock-pxa3xx.c21 #define BASE_CLK 13000000 macro
52 XL = xl * BASE_CLK; in pxa3xx_get_clk_frequency_khz()
58 HSS = (ro) ? RO_CLK : hss_mult[hss] * BASE_CLK; in pxa3xx_get_clk_frequency_khz()
106 hsio_clk = (acsr & ACCR_D0CS) ? RO_CLK : hss_mult[hss] * BASE_CLK; in clk_pxa3xx_hsio_getrate()
120 return BASE_CLK * smcfs_mult[(acsr >> 23) & 0x7] / in clk_pxa3xx_smemc_getrate()
Dpxa27x.c77 #define BASE_CLK 13000000 macro
103 L = l * BASE_CLK; in pxa27x_get_clk_frequency_khz()
142 L = l * BASE_CLK; in clk_pxa27x_mem_getrate()
167 L = l * BASE_CLK; in pxa27x_get_lcdclk_frequency_10khz()
Dpxa25x.c58 #define BASE_CLK 3686400 macro
77 L = l * BASE_CLK; in pxa25x_get_clk_frequency_khz()
100 return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK; in clk_pxa25x_mem_getrate()