Searched refs:BRIDGE_9XX_PCIEIO_LIMIT0 (Results 1 – 2 of 2) sorted by relevance
| /arch/mips/include/asm/netlogic/xlp-hal/ | ||
| D | bridge.h | 171 #define BRIDGE_9XX_PCIEIO_LIMIT0 0x65 macro |
| /arch/mips/pci/ | ||
| D | pci-xlp.c | 266 BRIDGE_9XX_PCIEIO_LIMIT0 + link); in xlp_config_pci_bswap() |