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Searched refs:CAN0_MBRIF1 (Results 1 – 4 of 4) sorted by relevance

/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h1051 #define CAN0_MBRIF1 0xffc02a24 /* CAN Controller 0 Mailbox Receive Interrup… macro
DcdefBF54x_base.h1810 #define bfin_read_CAN0_MBRIF1() bfin_read16(CAN0_MBRIF1)
1811 #define bfin_write_CAN0_MBRIF1(val) bfin_write16(CAN0_MBRIF1, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h85 #define CAN0_MBRIF1 0xFFC00A24 /* CAN0 Mailbox Receive Interrupt Flag Regis… macro
DcdefBF60x_base.h2444 #define bfin_read_CAN0_MBRIF1() bfin_read16(CAN0_MBRIF1)
2445 #define bfin_write_CAN0_MBRIF1(val) bfin_write16(CAN0_MBRIF1, val)