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Searched refs:CCCR (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-pxa/
Dsleep.S69 ldr r6, =CCCR
72 ldr r7, =CCCR_SLEEP @ prepare CCCR sleep value
112 ldr r6, =CCCR
Dpxa25x.c70 cccr = CCCR; in pxa25x_get_clk_frequency_khz()
100 return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK; in clk_pxa25x_mem_getrate()
Dpxa27x.c91 cccr_a = CCCR & (1 << 25); in pxa27x_get_clk_frequency_khz()
133 cccr_a = CCCR & (1 << 25); in clk_pxa27x_mem_getrate()
/arch/arm/mach-pxa/include/mach/
Dpxa2xx-regs.h137 #define CCCR __REG(0x41300000) /* Core Clock Configuration Register */ macro