Searched refs:CHCTR_ICEN (Results 1 – 10 of 10) sorted by relevance
| /arch/mn10300/mm/ |
| D | cache-dbg-flush-by-tag.S | 37 btst CHCTR_DCEN|CHCTR_ICEN,d0
89 btst CHCTR_DCEN|CHCTR_ICEN,d1
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| D | cache-dbg-flush-by-reg.S | 36 btst CHCTR_DCEN|CHCTR_ICEN,d0
78 btst CHCTR_ICEN,d0
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| D | cache-dbg-inv.S | 40 btst CHCTR_ICEN,d0
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| D | cache-dbg-inv-by-tag.S | 105 or CHCTR_ICEN,d0
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| D | cache.inc | 36 and ~CHCTR_ICEN,d0
56 or CHCTR_ICEN,d0
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| D | cache-inv-by-reg.S | 63 btst CHCTR_ICEN,d0
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| D | cache-inv-by-tag.S | 71 btst CHCTR_ICEN,d0
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| /arch/mn10300/kernel/ |
| D | head.S | 112 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK,d0
114 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRBACK|CHCTR_DCALMD,d0
117 mov CHCTR_ICEN|CHCTR_DCEN|CHCTR_DCWTMD_WRTHROUGH,d0
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| D | smp.c | 1019 "i"(~(CHCTR_ICEN | CHCTR_DCEN)), in hotplug_cpu_disable_cache()
1033 "i"(CHCTR_ICEN | CHCTR_DCEN) in hotplug_cpu_enable_cache()
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| /arch/mn10300/include/asm/ |
| D | cpu-regs.h | 173 #define CHCTR_ICEN 0x0001 /* instruction cache enable */ macro
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