Searched refs:CORE_CLK_SRC_DPLL_X2 (Results 1 – 4 of 4) sorted by relevance
126 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_reprogram_dpllcore()148 tmpset.cm_clksel2_pll |= CORE_CLK_SRC_DPLL_X2; in omap2_reprogram_dpllcore()150 done_rate = CORE_CLK_SRC_DPLL_X2; in omap2_reprogram_dpllcore()166 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_reprogram_dpllcore()
131 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_select_table_rate()139 CORE_CLK_SRC_DPLL_X2) in omap2_select_table_rate()140 done_rate = CORE_CLK_SRC_DPLL_X2; in omap2_select_table_rate()151 omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); in omap2_select_table_rate()
43 static u32 curr_perf_level = CORE_CLK_SRC_DPLL_X2;93 else if (level == CORE_CLK_SRC_DPLL_X2) in omap2xxx_sdrc_reprogram()
159 #define CORE_CLK_SRC_DPLL_X2 0x2 macro