| /arch/sh/kernel/cpu/sh2a/ |
| D | clock-sh7264.c | 78 DIV4_NR }; enumerator
84 struct clk div4_clks[DIV4_NR] = {
147 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7269.c | 106 DIV4_NR }; enumerator
112 struct clk div4_clks[DIV4_NR] = {
178 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| /arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7757.c | 63 enum { DIV4_I, DIV4_SH, DIV4_P, DIV4_NR }; enumerator
68 struct clk div4_clks[DIV4_NR] = {
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| D | clock-shx3.c | 62 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_SHA, DIV4_P, DIV4_NR }; enumerator
67 struct clk div4_clks[DIV4_NR] = {
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| D | clock-sh7722.c | 123 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator
125 struct clk div4_clks[DIV4_NR] = {
248 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7785.c | 67 DIV4_DU, DIV4_P, DIV4_NR }; enumerator
72 struct clk div4_clks[DIV4_NR] = {
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| D | clock-sh7366.c | 118 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; enumerator
123 struct clk div4_clks[DIV4_NR] = {
273 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7723.c | 121 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator
126 struct clk div4_clks[DIV4_NR] = {
296 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7343.c | 115 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; enumerator
120 struct clk div4_clks[DIV4_NR] = {
280 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7786.c | 68 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_DU, DIV4_P, DIV4_NR }; enumerator
73 struct clk div4_clks[DIV4_NR] = {
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| D | clock-sh7724.c | 160 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR }; enumerator
165 struct clk div4_clks[DIV4_NR] = {
370 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7734.c | 70 enum { DIV4_I, DIV4_S, DIV4_B, DIV4_M, DIV4_S1, DIV4_P, DIV4_NR }; enumerator
75 struct clk div4_clks[DIV4_NR] = {
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| /arch/arm/mach-shmobile/ |
| D | clock-r8a7791.c | 150 DIV4_NR enumerator
153 static struct clk div4_clks[DIV4_NR] = {
323 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in r8a7791_clock_init()
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| D | clock-sh73a0.c | 224 DIV4_Z, DIV4_ZX, DIV4_HP, DIV4_NR }; enumerator
229 static struct clk div4_clks[DIV4_NR] = {
351 for (i = 0; i < DIV4_NR; i++) in div4_clk_extend()
726 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in sh73a0_clock_init()
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| D | clock-r8a7790.c | 181 DIV4_SDH, DIV4_SD0, DIV4_SD1, DIV4_NR enumerator
184 static struct clk div4_clks[DIV4_NR] = {
449 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in r8a7790_clock_init()
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| D | clock-r8a73a4.c | 387 DIV4_NR }; enumerator
389 static struct clk div4_clks[DIV4_NR] = {
649 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in r8a73a4_clock_init()
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| D | clock-r8a7740.c | 318 DIV4_NR enumerator
321 static struct clk div4_clks[DIV4_NR] = {
655 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in r8a7740_clock_init()
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| D | clock-sh7372.c | 318 DIV4_DDRP, DIV4_NR }; enumerator
323 static struct clk div4_clks[DIV4_NR] = {
604 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in sh7372_clock_init()
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