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Searched refs:DMA10_X_MODIFY (Results 1 – 12 of 12) sorted by relevance

/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h365 #define DMA10_X_MODIFY 0xFFC00E94 /* DMA Channel 10 X Modify Register */ macro
DcdefBF522.h674 #define bfin_read_DMA10_X_MODIFY() bfin_read16(DMA10_X_MODIFY)
675 #define bfin_write_DMA10_X_MODIFY(val) bfin_write16(DMA10_X_MODIFY, val)
/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h365 #define DMA10_X_MODIFY 0xFFC00E94 /* DMA Channel 10 X Modify Register */ macro
DcdefBF512.h657 #define bfin_read_DMA10_X_MODIFY() bfin_read16(DMA10_X_MODIFY)
658 #define bfin_write_DMA10_X_MODIFY(val) bfin_write16(DMA10_X_MODIFY, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h341 #define DMA10_X_MODIFY 0xFFC00E94 /* DMA Channel 10 X Modify Register … macro
DcdefBF534.h636 #define bfin_read_DMA10_X_MODIFY() bfin_read16(DMA10_X_MODIFY)
637 #define bfin_write_DMA10_X_MODIFY(val) bfin_write16(DMA10_X_MODIFY,val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h470 #define DMA10_X_MODIFY 0xFFC01C94 /* DMA Channel 10 X Modify Register */ macro
DcdefBF538.h758 #define bfin_read_DMA10_X_MODIFY() bfin_read16(DMA10_X_MODIFY)
759 #define bfin_write_DMA10_X_MODIFY(val) bfin_write16(DMA10_X_MODIFY, val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h371 #define DMA10_X_MODIFY 0xffc00e94 /* DMA Channel 10 X Modify Register */ macro
DcdefBF54x_base.h607 #define bfin_read_DMA10_X_MODIFY() bfin_read16(DMA10_X_MODIFY)
608 #define bfin_write_DMA10_X_MODIFY(val) bfin_write16(DMA10_X_MODIFY, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h1734 #define DMA10_X_MODIFY 0xFFC05010 /* DMA10 Inner Loop Address Increment */ macro
DcdefBF60x_base.h705 #define bfin_read_DMA10_X_MODIFY() bfin_read32(DMA10_X_MODIFY)
706 #define bfin_write_DMA10_X_MODIFY(val) bfin_write32(DMA10_X_MODIFY, val)