Home
last modified time | relevance | path

Searched refs:DMA11_Y_MODIFY (Results 1 – 12 of 12) sorted by relevance

/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h381 #define DMA11_Y_MODIFY 0xFFC00EDC /* DMA Channel 11 Y Modify Register */ macro
DcdefBF522.h703 #define bfin_read_DMA11_Y_MODIFY() bfin_read16(DMA11_Y_MODIFY)
704 #define bfin_write_DMA11_Y_MODIFY(val) bfin_write16(DMA11_Y_MODIFY, val)
/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h381 #define DMA11_Y_MODIFY 0xFFC00EDC /* DMA Channel 11 Y Modify Register */ macro
DcdefBF512.h686 #define bfin_read_DMA11_Y_MODIFY() bfin_read16(DMA11_Y_MODIFY)
687 #define bfin_write_DMA11_Y_MODIFY(val) bfin_write16(DMA11_Y_MODIFY, val)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h357 #define DMA11_Y_MODIFY 0xFFC00EDC /* DMA Channel 11 Y Modify Register … macro
DcdefBF534.h665 #define bfin_read_DMA11_Y_MODIFY() bfin_read16(DMA11_Y_MODIFY)
666 #define bfin_write_DMA11_Y_MODIFY(val) bfin_write16(DMA11_Y_MODIFY,val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h486 #define DMA11_Y_MODIFY 0xFFC01CDC /* DMA Channel 11 Y Modify Register */ macro
DcdefBF538.h788 #define bfin_read_DMA11_Y_MODIFY() bfin_read16(DMA11_Y_MODIFY)
789 #define bfin_write_DMA11_Y_MODIFY(val) bfin_write16(DMA11_Y_MODIFY, val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h389 #define DMA11_Y_MODIFY 0xffc00edc /* DMA Channel 11 Y Modify Register */ macro
DcdefBF54x_base.h640 #define bfin_read_DMA11_Y_MODIFY() bfin_read16(DMA11_Y_MODIFY)
641 #define bfin_write_DMA11_Y_MODIFY(val) bfin_write16(DMA11_Y_MODIFY, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h1757 #define DMA11_Y_MODIFY 0xFFC05098 /* DMA11 Outer Loop Address Increment (2… macro
DcdefBF60x_base.h746 #define bfin_read_DMA11_Y_MODIFY() bfin_read32(DMA11_Y_MODIFY)
747 #define bfin_write_DMA11_Y_MODIFY(val) bfin_write32(DMA11_Y_MODIFY, val)