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Searched refs:DMA17_CONFIG (Results 1 – 6 of 6) sorted by relevance

/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h566 #define DMA17_CONFIG 0xFFC01E48 /* DMA Channel 17 Configuration Register */ macro
DcdefBF538.h936 #define bfin_read_DMA17_CONFIG() bfin_read16(DMA17_CONFIG)
937 #define bfin_write_DMA17_CONFIG(val) bfin_write16(DMA17_CONFIG, val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h779 #define DMA17_CONFIG 0xffc01d48 /* DMA Channel 17 Configuration Register */ macro
DcdefBF54x_base.h1312 #define bfin_read_DMA17_CONFIG() bfin_read16(DMA17_CONFIG)
1313 #define bfin_write_DMA17_CONFIG(val) bfin_write16(DMA17_CONFIG, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h1879 #define DMA17_CONFIG 0xFFC07208 /* DMA17 Configuration Register */ macro
DcdefBF60x_base.h960 #define bfin_read_DMA17_CONFIG() bfin_read32(DMA17_CONFIG)
961 #define bfin_write_DMA17_CONFIG(val) bfin_write32(DMA17_CONFIG, val)