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Searched refs:DRA7XX_CM_CORE_CORE_INST (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-omap2/
Dcm2_7xx.h37 #define DRA7XX_CM_CORE_CORE_INST 0x0700 macro
170 #define DRA7XX_CM_L3MAIN1_L3_MAIN_1_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x00…
172 #define DRA7XX_CM_L3MAIN1_GPMC_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x0028)
174 #define DRA7XX_CM_L3MAIN1_MMU_EDMA_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x003…
176 #define DRA7XX_CM_L3MAIN1_OCMC_RAM1_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x00…
178 #define DRA7XX_CM_L3MAIN1_OCMC_RAM2_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x00…
180 #define DRA7XX_CM_L3MAIN1_OCMC_RAM3_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x00…
182 #define DRA7XX_CM_L3MAIN1_OCMC_ROM_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x006…
184 #define DRA7XX_CM_L3MAIN1_TPCC_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x0070)
186 #define DRA7XX_CM_L3MAIN1_TPTC1_CLKCTRL DRA7XX_CM_CORE_REGADDR(DRA7XX_CM_CORE_CORE_INST, 0x0078)
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Dclockdomains7xx_data.c383 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
419 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
492 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
502 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
534 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
544 .cm_inst = DRA7XX_CM_CORE_CORE_INST,
564 .cm_inst = DRA7XX_CM_CORE_CORE_INST,