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Searched refs:EBIU_DDRCTL0 (Results 1 – 4 of 4) sorted by relevance

/arch/blackfin/include/asm/
Dmem_init.h213 #if defined(EBIU_DDRCTL0)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h163 #define EBIU_DDRCTL0 0xffc00a20 /* DDR Memory Control 0 Register */ macro
DcdefBF54x_base.h230 #define bfin_read_EBIU_DDRCTL0() bfin_read32(EBIU_DDRCTL0)
231 #define bfin_write_EBIU_DDRCTL0(val) bfin_write32(EBIU_DDRCTL0, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c923 D32(EBIU_DDRCTL0); in bfin_debug_mmrs_init()