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Searched refs:EBIU_RSTCTL (Results 1 – 4 of 4) sorted by relevance

/arch/blackfin/mach-common/
Ddpmc_modes.S193 #if defined(EBIU_RSTCTL) /* DDR */
194 P0.H = hi(EBIU_RSTCTL);
195 P0.L = lo(EBIU_RSTCTL);
231 #if defined(EBIU_RSTCTL) /* DDR */
232 P0.H = hi(EBIU_RSTCTL);
233 P0.L = lo(EBIU_RSTCTL);
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h170 #define EBIU_RSTCTL 0xffc00a3c /* DDR Reset Control Register */ macro
DcdefBF54x_base.h244 #define bfin_read_EBIU_RSTCTL() bfin_read16(EBIU_RSTCTL)
245 #define bfin_write_EBIU_RSTCTL(val) bfin_write16(EBIU_RSTCTL, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c937 D16(EBIU_RSTCTL); in bfin_debug_mmrs_init()