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Searched refs:EMAC_TX_IRQE (Results 1 – 7 of 7) sorted by relevance

/arch/blackfin/mach-bf518/include/mach/
DcdefBF516.h68 #define bfin_read_EMAC_TX_IRQE() bfin_read32(EMAC_TX_IRQE)
69 #define bfin_write_EMAC_TX_IRQE(val) bfin_write32(EMAC_TX_IRQE, val)
DdefBF516.h43 #define EMAC_TX_IRQE 0xFFC0307C /* TX Frame Status Interrupt Enables Register … macro
/arch/blackfin/mach-bf527/include/mach/
DcdefBF527.h68 #define bfin_read_EMAC_TX_IRQE() bfin_read32(EMAC_TX_IRQE)
69 #define bfin_write_EMAC_TX_IRQE(val) bfin_write32(EMAC_TX_IRQE, val)
DdefBF527.h42 #define EMAC_TX_IRQE 0xFFC0307C /* TX Frame Status Interrupt Enables Register … macro
/arch/blackfin/mach-bf537/include/mach/
DcdefBF537.h68 #define bfin_read_EMAC_TX_IRQE() bfin_read32(EMAC_TX_IRQE)
69 #define bfin_write_EMAC_TX_IRQE(val) bfin_write32(EMAC_TX_IRQE,val)
DdefBF537.h45 #define EMAC_TX_IRQE 0xFFC0307C /* TX Frame Status Interrupt Enables Register */ macro
/arch/blackfin/kernel/
Ddebug-mmrs.c1007 D32(EMAC_TX_IRQE); in bfin_debug_mmrs_init()