Searched refs:GT_READ (Results 1 – 9 of 9) sorted by relevance
38 cause = GT_READ(GT_INTRCAUSE_OFS); in ack_gt641xx_irq()50 mask = GT_READ(GT_INTRMASK_OFS); in mask_gt641xx_irq()62 mask = GT_READ(GT_INTRMASK_OFS); in mask_ack_gt641xx_irq()66 cause = GT_READ(GT_INTRCAUSE_OFS); in mask_ack_gt641xx_irq()78 mask = GT_READ(GT_INTRMASK_OFS); in unmask_gt641xx_irq()97 cause = GT_READ(GT_INTRCAUSE_OFS); in gt641xx_irq_dispatch()98 mask = GT_READ(GT_INTRMASK_OFS); in gt641xx_irq_dispatch()
39 if (GT_READ(GT_TC0_OFS)) in gt641xx_timer0_state()55 ctrl = GT_READ(GT_TC_CONTROL_OFS); in gt641xx_timer0_set_next_event()74 ctrl = GT_READ(GT_TC_CONTROL_OFS); in gt641xx_timer0_set_mode()
115 start = GT_READ(GT_PCI0M0LD_OFS); in mips_pcibios_init()116 end = GT_READ(GT_PCI0M0HD_OFS); in mips_pcibios_init()117 map = GT_READ(GT_PCI0M0REMAP_OFS); in mips_pcibios_init()119 start1 = GT_READ(GT_PCI0M1LD_OFS); in mips_pcibios_init()120 end1 = GT_READ(GT_PCI0M1HD_OFS); in mips_pcibios_init()121 map1 = GT_READ(GT_PCI0M1REMAP_OFS); in mips_pcibios_init()142 start = GT_READ(GT_PCI0IOLD_OFS); in mips_pcibios_init()143 end = GT_READ(GT_PCI0IOHD_OFS); in mips_pcibios_init()144 map = GT_READ(GT_PCI0IOREMAP_OFS); in mips_pcibios_init()
77 *data = GT_READ(GT_PCI0_CFGDATA_OFS); in gt64xxx_pci0_pcibios_config_access()83 intr = GT_READ(GT_INTRCAUSE_OFS); in gt64xxx_pci0_pcibios_config_access()
115 timeo = GT_READ(GT_PCI0_TOR_OFS); in qube_raq_galileo_fixup()123 GT_WRITE(GT_INTRMASK_OFS, GT_INTR_RETRYCTR0_MSK | GT_READ(GT_INTRMASK_OFS)); in qube_raq_galileo_fixup()
43 addr = GT_READ(reg); in get_gt_port_base()
190 start = GT_READ(GT_PCI0IOLD_OFS); in prom_init()191 map = GT_READ(GT_PCI0IOREMAP_OFS); in prom_init()
66 irq = GT_READ(GT_PCI0_IACK_OFS); in mips_pcibios_iack()176 intrcause = GT_READ(GT_INTRCAUSE_OFS); in corehi_irqdispatch()177 datalo = GT_READ(GT_CPUERR_ADDRLO_OFS); in corehi_irqdispatch()178 datahi = GT_READ(GT_CPUERR_ADDRHI_OFS); in corehi_irqdispatch()
572 #define GT_READ(ofs) le32_to_cpu(__GT_READ(ofs)) macro