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Searched refs:INIT_CLKREG (Results 1 – 11 of 11) sorted by relevance

/arch/arm/mach-mmp/
Dclock-pxa168.c65 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
66 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
67 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
68 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
69 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
70 INIT_CLKREG(&clk_pwm1, "pxa168-pwm.0", NULL),
71 INIT_CLKREG(&clk_pwm2, "pxa168-pwm.1", NULL),
72 INIT_CLKREG(&clk_pwm3, "pxa168-pwm.2", NULL),
73 INIT_CLKREG(&clk_pwm4, "pxa168-pwm.3", NULL),
74 INIT_CLKREG(&clk_ssp1, "pxa168-ssp.0", NULL),
[all …]
Dclock-pxa910.c50 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
51 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
52 INIT_CLKREG(&clk_twsi0, "pxa2xx-i2c.0", NULL),
53 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.1", NULL),
54 INIT_CLKREG(&clk_pwm1, "pxa910-pwm.0", NULL),
55 INIT_CLKREG(&clk_pwm2, "pxa910-pwm.1", NULL),
56 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
57 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
58 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
59 INIT_CLKREG(&clk_gpio, "mmp-gpio", NULL),
[all …]
Dclock-mmp2.c90 INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
91 INIT_CLKREG(&clk_uart2, "pxa2xx-uart.1", NULL),
92 INIT_CLKREG(&clk_uart3, "pxa2xx-uart.2", NULL),
93 INIT_CLKREG(&clk_uart4, "pxa2xx-uart.3", NULL),
94 INIT_CLKREG(&clk_twsi1, "pxa2xx-i2c.0", NULL),
95 INIT_CLKREG(&clk_twsi2, "pxa2xx-i2c.1", NULL),
96 INIT_CLKREG(&clk_twsi3, "pxa2xx-i2c.2", NULL),
97 INIT_CLKREG(&clk_twsi4, "pxa2xx-i2c.3", NULL),
98 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
99 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
[all …]
Dclock.h63 #define INIT_CLKREG(_clk, _devname, _conname) \ macro
/arch/arm/mach-pxa/
Dpxa27x.c213 INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
214 INIT_CLKREG(&clk_pxa27x_camera, "pxa27x-camera.0", NULL),
215 INIT_CLKREG(&clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL),
216 INIT_CLKREG(&clk_pxa27x_btuart, "pxa2xx-uart.1", NULL),
217 INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-uart.2", NULL),
218 INIT_CLKREG(&clk_pxa27x_i2s, "pxa2xx-i2s", NULL),
219 INIT_CLKREG(&clk_pxa27x_i2c, "pxa2xx-i2c.0", NULL),
220 INIT_CLKREG(&clk_pxa27x_usb, "pxa27x-udc", NULL),
221 INIT_CLKREG(&clk_pxa27x_mmc, "pxa2xx-mci.0", NULL),
222 INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-ir", "UARTCLK"),
[all …]
Dpxa25x.c192 INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
193 INIT_CLKREG(&clk_pxa25x_ffuart, "pxa2xx-uart.0", NULL),
194 INIT_CLKREG(&clk_pxa25x_btuart, "pxa2xx-uart.1", NULL),
195 INIT_CLKREG(&clk_pxa25x_stuart, "pxa2xx-uart.2", NULL),
196 INIT_CLKREG(&clk_pxa25x_usb, "pxa25x-udc", NULL),
197 INIT_CLKREG(&clk_pxa25x_mmc, "pxa2xx-mci.0", NULL),
198 INIT_CLKREG(&clk_pxa25x_i2c, "pxa2xx-i2c.0", NULL),
199 INIT_CLKREG(&clk_pxa25x_ssp, "pxa25x-ssp.0", NULL),
200 INIT_CLKREG(&clk_pxa25x_nssp, "pxa25x-nssp.1", NULL),
201 INIT_CLKREG(&clk_pxa25x_assp, "pxa25x-nssp.2", NULL),
[all …]
Dpxa3xx.c72 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
74 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
75 INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
76 INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
77 INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
78 INIT_CLKREG(&clk_pxa3xx_ffuart, "pxa2xx-uart.0", NULL),
79 INIT_CLKREG(&clk_pxa3xx_btuart, "pxa2xx-uart.1", NULL),
80 INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-uart.2", NULL),
81 INIT_CLKREG(&clk_pxa3xx_stuart, "pxa2xx-ir", "UARTCLK"),
82 INIT_CLKREG(&clk_pxa3xx_i2c, "pxa2xx-i2c.0", NULL),
[all …]
Dpxa300.c91 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
92 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
98 INIT_CLKREG(&clk_pxa310_mmc3, "pxa2xx-mci.2", NULL),
Dpxa320.c85 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
86 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
Dclock.h25 #define INIT_CLKREG(_clk,_devname,_conname) \ macro
Deseries.c143 INIT_CLKREG(&tmio_dummy_clk, NULL, "CLK_CK32K"),