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Searched refs:IO_BITNR (Results 1 – 3 of 3) sorted by relevance

/arch/cris/include/arch-v10/arch/
Dirq.h16 #define SOME_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, some) /* 0 ? */
17 #define NMI_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, nmi) /* 1 */
18 #define TIMER0_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, timer0) /* 2 */
19 #define TIMER1_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, timer1) /* 3 */
22 #define NETWORK_STATUS_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, network) /* 6 */
24 #define SERIAL_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, serial) /* 8 */
25 #define PA_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, pa) /* 11 */
27 #define EXTDMA0_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, ext_dma0)
28 #define EXTDMA1_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, ext_dma1)
32 #define DMA0_TX_IRQ_NBR IO_BITNR(R_VECT_MASK_RD, dma0)
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/arch/cris/include/uapi/arch-v10/arch/
Dsv_addr_ag.h57 #define IO_BITNR(reg, field) IO_BITNR_ (reg##_, field##_) macro
131 IO_MASK( R_EXT_DMA_0_STAT, TFR_COUNT ) >> IO_BITNR( R_EXT_DMA_0_STAT, TFR_COUNT )
/arch/cris/arch-v10/drivers/
Dsync_serial.c206 .data_avail_bit = IO_BITNR(R_IRQ_MASK1_RD, ser1_data),
207 .transmitter_ready_bit = IO_BITNR(R_IRQ_MASK1_RD, ser1_ready),
208 .input_dma_descr_bit = IO_BITNR(R_IRQ_MASK2_RD, dma9_descr),
209 .output_dma_bit = IO_BITNR(R_IRQ_MASK2_RD, dma8_eop),
229 .data_avail_bit = IO_BITNR(R_IRQ_MASK1_RD, ser3_data),
230 .transmitter_ready_bit = IO_BITNR(R_IRQ_MASK1_RD, ser3_ready),
231 .input_dma_descr_bit = IO_BITNR(R_IRQ_MASK2_RD, dma5_descr),
232 .output_dma_bit = IO_BITNR(R_IRQ_MASK2_RD, dma4_eop),