Searched refs:ISR (Results 1 – 12 of 12) sorted by relevance
| /arch/arc/kernel/ |
| D | entry.S | 185 ; Level 2 ISR: Can interrupt a Level 1 ISR
200 ; if L2 IRQ interrupted a L1 ISR, disable preemption
215 ; setup params for Linux common ISR and invoke it
233 ; Level 1 ISR
687 ; if L2 IRQ interrupted an L1 ISR, we'd disabled preemption earlier
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| /arch/m68k/68000/ |
| D | ints.c | 82 unsigned long pend = ISR; in process_int()
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| /arch/ia64/kernel/ |
| D | paravirt.c | 188 CASE_GET_CR(ISR); in ia64_native_getreg_func()
268 CASE_SET_CR(ISR); in ia64_native_setreg_func()
448 __DEFINE_GET_CR(ISR, isr)
531 __DEFINE_SET_CR(ISR, isr)
841 IA64_NATIVE_PATCH_BUNDLE_ELEM_CR(isr, ISR),
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| /arch/microblaze/kernel/ |
| D | intc.c | 23 #define ISR 0x00 /* Interrupt Status Register */ macro
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| /arch/avr32/mach-at32ap/ |
| D | pio.c | 294 isr = pio_readl(pio, ISR) & pio_readl(pio, IMR); in gpio_irq_handler()
469 (void) pio_readl(pio, ISR); in at32_init_pio()
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| D | extint.c | 153 status = eic_readl(eic, ISR); in demux_eic_irq()
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| D | at32ap700x.c | 223 status = pm_readl(ISR); in pll1_mode()
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| /arch/m68k/include/asm/ |
| D | MC68EZ328.h | 281 #define ISR LONG_REF(ISR_ADDR) macro
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| D | MC68328.h | 358 #define ISR LONG_REF(ISR_ADDR) macro
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| D | MC68VZ328.h | 291 #define ISR LONG_REF(ISR_ADDR) macro
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| /arch/frv/kernel/ |
| D | entry.S | 190 # ISR - kernel's preferred integer controls
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| /arch/x86/kvm/ |
| D | trace.h | 163 AREG(EOI), AREG(RRR), AREG(LDR), AREG(DFR), AREG(SPIV), AREG(ISR), \
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