Home
last modified time | relevance | path

Searched refs:MAX_HWEVENTS (Results 1 – 12 of 12) sorted by relevance

/arch/metag/kernel/perf/
Dperf_event.h37 #define MAX_HWEVENTS 3 macro
39 #define METAG_INST_COUNTER (MAX_HWEVENTS - 1)
51 struct perf_event *events[MAX_HWEVENTS];
52 unsigned long used_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
Dperf_event.c802 .max_events = MAX_HWEVENTS,
/arch/blackfin/include/asm/
Dperf_event.h1 #define MAX_HWEVENTS 2 macro
/arch/alpha/kernel/
Dperf_event.c29 #define MAX_HWEVENTS 3 macro
40 struct perf_event *event[MAX_HWEVENTS];
42 unsigned long evtype[MAX_HWEVENTS];
46 int current_idx[MAX_HWEVENTS];
71 int pmc_count_shift[MAX_HWEVENTS];
76 unsigned long pmc_count_mask[MAX_HWEVENTS];
78 unsigned long pmc_max_period[MAX_HWEVENTS];
605 struct perf_event *evts[MAX_HWEVENTS]; in __hw_perf_event_init()
606 unsigned long evtypes[MAX_HWEVENTS]; in __hw_perf_event_init()
607 int idx_rubbish_bin[MAX_HWEVENTS]; in __hw_perf_event_init()
/arch/powerpc/include/asm/
Dperf_event_fsl_emb.h16 #define MAX_HWEVENTS 6 macro
Dperf_event_server.h18 #define MAX_HWEVENTS 8 macro
/arch/sh/include/asm/
Dperf_event.h6 #define MAX_HWEVENTS 2 macro
/arch/sh/kernel/
Dperf_event.c32 struct perf_event *events[MAX_HWEVENTS];
33 unsigned long used_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
34 unsigned long active_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
394 WARN_ON(_pmu->num_events > MAX_HWEVENTS); in register_sh_pmu()
/arch/blackfin/kernel/
Dperf_event.c231 struct perf_event *events[MAX_HWEVENTS];
232 unsigned long used_mask[BITS_TO_LONGS(MAX_HWEVENTS)];
356 idx = find_first_zero_bit(cpuc->used_mask, MAX_HWEVENTS); in bfin_pmu_add()
357 if (idx == MAX_HWEVENTS) in bfin_pmu_add()
429 for (i = 0; i < MAX_HWEVENTS; ++i) { in bfin_pmu_enable()
/arch/powerpc/perf/
Dcore-book3s.c36 struct perf_event *event[MAX_HWEVENTS];
37 u64 events[MAX_HWEVENTS];
38 unsigned int flags[MAX_HWEVENTS];
47 u64 alternatives[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
48 unsigned long amasks[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
49 unsigned long avalues[MAX_HWEVENTS][MAX_EVENT_ALTERNATIVES];
774 u32 pmcs[MAX_HWEVENTS]; in perf_event_print_debug()
788 for (; i < MAX_HWEVENTS; i++) in perf_event_print_debug()
832 unsigned long smasks[MAX_HWEVENTS], svalues[MAX_HWEVENTS]; in power_check_constraints()
833 int n_alt[MAX_HWEVENTS], choice[MAX_HWEVENTS]; in power_check_constraints()
[all …]
Dcore-fsl-emb.c27 struct perf_event *event[MAX_HWEVENTS];
483 struct perf_event *events[MAX_HWEVENTS]; in fsl_emb_pmu_event_init()
489 if (ppmu->n_counter > MAX_HWEVENTS) { in fsl_emb_pmu_event_init()
491 ppmu->n_counter, MAX_HWEVENTS); in fsl_emb_pmu_event_init()
492 ppmu->n_counter = MAX_HWEVENTS; in fsl_emb_pmu_event_init()
/arch/sparc/kernel/
Dperf_event.c68 #define MAX_HWEVENTS 4 macro
90 struct perf_event *event[MAX_HWEVENTS];
96 unsigned long events[MAX_HWEVENTS];
103 int current_idx[MAX_HWEVENTS];
106 u64 pcr[MAX_HWEVENTS];
1396 struct perf_event *evts[MAX_HWEVENTS]; in sparc_pmu_event_init()
1398 unsigned long events[MAX_HWEVENTS]; in sparc_pmu_event_init()
1399 int current_idx_dmy[MAX_HWEVENTS]; in sparc_pmu_event_init()