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Searched refs:MDMA_S2_CONFIG (Results 1 – 6 of 6) sorted by relevance

/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h722 #define MDMA_S2_CONFIG 0xFFC00F48 /*MemDMA2 Stream 0 Source Configuration register */ macro
DcdefBF561.h866 #define bfin_read_MDMA_S2_CONFIG() bfin_read16(MDMA_S2_CONFIG)
867 #define bfin_write_MDMA_S2_CONFIG(val) bfin_write16(MDMA_S2_CONFIG,val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h622 #define MDMA_S2_CONFIG 0xFFC01F48 /* MemDMA1 Stream 0 Source Configuration Register */ macro
DcdefBF538.h1144 #define bfin_read_MDMA_S2_CONFIG() bfin_read16(MDMA_S2_CONFIG)
1145 #define bfin_write_MDMA_S2_CONFIG(val) bfin_write16(MDMA_S2_CONFIG, val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h904 #define MDMA_S2_CONFIG 0xffc01f48 /* Memory DMA Stream 2 Source Configuration … macro
DcdefBF54x_base.h1541 #define bfin_read_MDMA_S2_CONFIG() bfin_read16(MDMA_S2_CONFIG)
1542 #define bfin_write_MDMA_S2_CONFIG(val) bfin_write16(MDMA_S2_CONFIG, val)