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Searched refs:MDMA_S3_CONFIG (Results 1 – 6 of 6) sorted by relevance

/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h750 #define MDMA_S3_CONFIG 0xFFC00FC8 /*MemDMA2 Stream 1 Source Configuration register */ macro
DcdefBF561.h918 #define bfin_read_MDMA_S3_CONFIG() bfin_read16(MDMA_S3_CONFIG)
919 #define bfin_write_MDMA_S3_CONFIG(val) bfin_write16(MDMA_S3_CONFIG,val)
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h650 #define MDMA_S3_CONFIG 0xFFC01FC8 /* MemDMA1 Stream 1 Source Configuration Register */ macro
DcdefBF538.h1196 #define bfin_read_MDMA_S3_CONFIG() bfin_read16(MDMA_S3_CONFIG)
1197 #define bfin_write_MDMA_S3_CONFIG(val) bfin_write16(MDMA_S3_CONFIG, val)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h933 #define MDMA_S3_CONFIG 0xffc01fc8 /* Memory DMA Stream 3 Source Configuration … macro
DcdefBF54x_base.h1596 #define bfin_read_MDMA_S3_CONFIG() bfin_read16(MDMA_S3_CONFIG)
1597 #define bfin_write_MDMA_S3_CONFIG(val) bfin_write16(MDMA_S3_CONFIG, val)