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Searched refs:M_SCD_TRACE_CFG_RESET (Results 1 – 3 of 3) sorted by relevance

/arch/mips/sibyte/common/
Dbus_watcher.c196 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in sibyte_bw_int()
249 csr_out32(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in sibyte_bus_watcher()
Dsb_tbprof.c192 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in arm_tb()
233 __raw_writeq(M_SCD_TRACE_CFG_RESET, in sbprof_tb_intr()
244 __raw_writeq(M_SCD_TRACE_CFG_RESET, IOADDR(A_SCD_TRACE_CFG)); in sbprof_tb_intr()
/arch/mips/include/asm/sibyte/
Dsb1250_scd.h520 #define M_SCD_TRACE_CFG_RESET _SB_MAKEMASK1(0) macro