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Searched refs:OTG_BASE (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-omap1/include/mach/
Dusb.h30 #define OTG_BASE OMAP1_OTG_BASE macro
37 #define OTG_REV (OTG_BASE + 0x00)
38 #define OTG_SYSCON_1 (OTG_BASE + 0x04)
47 #define OTG_SYSCON_2 (OTG_BASE + 0x08)
65 #define OTG_CTRL (OTG_BASE + 0x0c)
92 #define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */
102 #define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */
104 #define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */
117 #define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */
118 #define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */
/arch/arm/mach-omap1/
Dusb.c273 .start = OTG_BASE,
274 .end = OTG_BASE + 0xff,
Dclock_data.c536 .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */