1 /*
2 * omap-secure.h: OMAP Secure infrastructure header.
3 *
4 * Copyright (C) 2011 Texas Instruments, Inc.
5 * Santosh Shilimkar <santosh.shilimkar@ti.com>
6 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
7 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13 #ifndef OMAP_ARCH_OMAP_SECURE_H
14 #define OMAP_ARCH_OMAP_SECURE_H
15
16 /* Monitor error code */
17 #define API_HAL_RET_VALUE_NS2S_CONVERSION_ERROR 0xFFFFFFFE
18 #define API_HAL_RET_VALUE_SERVICE_UNKNWON 0xFFFFFFFF
19
20 /* HAL API error codes */
21 #define API_HAL_RET_VALUE_OK 0x00
22 #define API_HAL_RET_VALUE_FAIL 0x01
23
24 /* Secure HAL API flags */
25 #define FLAG_START_CRITICAL 0x4
26 #define FLAG_IRQFIQ_MASK 0x3
27 #define FLAG_IRQ_ENABLE 0x2
28 #define FLAG_FIQ_ENABLE 0x1
29 #define NO_FLAG 0x0
30
31 /* Maximum Secure memory storage size */
32 #define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
33
34 /* Secure low power HAL API index */
35 #define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a
36 #define OMAP4_HAL_SAVEHW_INDEX 0x1b
37 #define OMAP4_HAL_SAVEALL_INDEX 0x1c
38 #define OMAP4_HAL_SAVEGIC_INDEX 0x1d
39
40 /* Secure Monitor mode APIs */
41 #define OMAP4_MON_SCU_PWR_INDEX 0x108
42 #define OMAP4_MON_L2X0_DBG_CTRL_INDEX 0x100
43 #define OMAP4_MON_L2X0_CTRL_INDEX 0x102
44 #define OMAP4_MON_L2X0_AUXCTRL_INDEX 0x109
45 #define OMAP4_MON_L2X0_PREFETCH_INDEX 0x113
46
47 #define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
48 #define OMAP5_MON_AMBA_IF_INDEX 0x108
49
50 /* Secure PPA(Primary Protected Application) APIs */
51 #define OMAP4_PPA_L2_POR_INDEX 0x23
52 #define OMAP4_PPA_CPU_ACTRL_SMP_INDEX 0x25
53
54 /* Secure RX-51 PPA (Primary Protected Application) APIs */
55 #define RX51_PPA_HWRNG 29
56 #define RX51_PPA_L2_INVAL 40
57 #define RX51_PPA_WRITE_ACR 42
58
59 #ifndef __ASSEMBLER__
60
61 extern u32 omap_secure_dispatcher(u32 idx, u32 flag, u32 nargs,
62 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
63 extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
64 extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
65 extern phys_addr_t omap_secure_ram_mempool_base(void);
66 extern int omap_secure_ram_reserve_memblock(void);
67
68 extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
69 u32 arg1, u32 arg2, u32 arg3, u32 arg4);
70 extern u32 rx51_secure_update_aux_cr(u32 set_bits, u32 clear_bits);
71 extern u32 rx51_secure_rng_call(u32 ptr, u32 count, u32 flag);
72
73 #ifdef CONFIG_OMAP4_ERRATA_I688
74 extern int omap_barrier_reserve_memblock(void);
75 #else
omap_barrier_reserve_memblock(void)76 static inline void omap_barrier_reserve_memblock(void)
77 { }
78 #endif
79
80 #ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
81 void set_cntfreq(void);
82 #else
set_cntfreq(void)83 static inline void set_cntfreq(void)
84 {
85 }
86 #endif
87
88 #endif /* __ASSEMBLER__ */
89 #endif /* OMAP_ARCH_OMAP_SECURE_H */
90