Searched refs:SDRC_RFR_CTRL_133MHz (Results 1 – 3 of 3) sorted by relevance
| /arch/arm/mach-omap2/ |
| D | opp2420_data.c | 80 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz,
86 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz,
106 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz,
112 MX_CLKSEL2_PLL_2x_VAL, 0, SDRC_RFR_CTRL_133MHz,
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| D | opp2430_data.c | 59 SDRC_RFR_CTRL_133MHz,
75 SDRC_RFR_CTRL_133MHz,
91 SDRC_RFR_CTRL_133MHz,
107 SDRC_RFR_CTRL_133MHz,
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| D | sdrc.h | 189 #define SDRC_RFR_CTRL_133MHz (0x0003de00 | 1) macro
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