Searched refs:SH_FIXED_RATIO_CLK_SET (Results 1 – 5 of 5) sorted by relevance
| /arch/arm/mach-shmobile/ |
| D | clock-r8a7790.c | 109 SH_FIXED_RATIO_CLK_SET(pll1_clk, main_clk, 1, 1);
110 SH_FIXED_RATIO_CLK_SET(pll3_clk, main_clk, 1, 1);
111 SH_FIXED_RATIO_CLK_SET(lb_clk, pll1_clk, 1, 1);
112 SH_FIXED_RATIO_CLK_SET(qspi_clk, pll1_clk, 1, 1);
115 SH_FIXED_RATIO_CLK_SET(extal_div2_clk, extal_clk, 1, 2);
116 SH_FIXED_RATIO_CLK_SET(cp_clk, extal_clk, 1, 2);
118 SH_FIXED_RATIO_CLK_SET(pll1_div2_clk, pll1_clk, 1, 2);
119 SH_FIXED_RATIO_CLK_SET(zg_clk, pll1_clk, 1, 3);
120 SH_FIXED_RATIO_CLK_SET(zx_clk, pll1_clk, 1, 3);
121 SH_FIXED_RATIO_CLK_SET(zs_clk, pll1_clk, 1, 6);
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| D | clock-r8a7779.c | 80 SH_FIXED_RATIO_CLK_SET(clkz_clk, plla_clk, 1, 1);
81 SH_FIXED_RATIO_CLK_SET(clkzs_clk, plla_clk, 1, 1);
82 SH_FIXED_RATIO_CLK_SET(clki_clk, plla_clk, 1, 1);
83 SH_FIXED_RATIO_CLK_SET(clks_clk, plla_clk, 1, 1);
84 SH_FIXED_RATIO_CLK_SET(clks1_clk, plla_clk, 1, 1);
85 SH_FIXED_RATIO_CLK_SET(clks3_clk, plla_clk, 1, 1);
86 SH_FIXED_RATIO_CLK_SET(clks4_clk, plla_clk, 1, 1);
87 SH_FIXED_RATIO_CLK_SET(clkb_clk, plla_clk, 1, 1);
88 SH_FIXED_RATIO_CLK_SET(clkout_clk, plla_clk, 1, 1);
89 SH_FIXED_RATIO_CLK_SET(clkp_clk, plla_clk, 1, 1);
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| D | clock-r8a7791.c | 101 SH_FIXED_RATIO_CLK_SET(pll1_clk, main_clk, 1, 1);
102 SH_FIXED_RATIO_CLK_SET(pll3_clk, main_clk, 1, 1);
103 SH_FIXED_RATIO_CLK_SET(qspi_clk, pll1_clk, 1, 1);
106 SH_FIXED_RATIO_CLK_SET(extal_div2_clk, extal_clk, 1, 2);
107 SH_FIXED_RATIO_CLK_SET(cp_clk, extal_clk, 1, 2);
109 SH_FIXED_RATIO_CLK_SET(pll1_div2_clk, pll1_clk, 1, 2);
110 SH_FIXED_RATIO_CLK_SET(hp_clk, pll1_clk, 1, 12);
111 SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24);
112 SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024));
113 SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15);
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| D | clock-r8a7778.c | 85 SH_FIXED_RATIO_CLK_SET(plla_clk, extal_clk, 1, 1);
86 SH_FIXED_RATIO_CLK_SET(pllb_clk, extal_clk, 1, 1);
87 SH_FIXED_RATIO_CLK_SET(i_clk, plla_clk, 1, 1);
88 SH_FIXED_RATIO_CLK_SET(s_clk, plla_clk, 1, 1);
89 SH_FIXED_RATIO_CLK_SET(s1_clk, plla_clk, 1, 1);
90 SH_FIXED_RATIO_CLK_SET(s3_clk, plla_clk, 1, 1);
91 SH_FIXED_RATIO_CLK_SET(s4_clk, plla_clk, 1, 1);
92 SH_FIXED_RATIO_CLK_SET(b_clk, plla_clk, 1, 1);
93 SH_FIXED_RATIO_CLK_SET(out_clk, plla_clk, 1, 1);
94 SH_FIXED_RATIO_CLK_SET(p_clk, plla_clk, 1, 1);
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| D | clock.h | 45 #define SH_FIXED_RATIO_CLK_SET(name, p, m, d) \ macro
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