| /arch/sh/kernel/cpu/sh5/ |
| D | entry.S | 257 putcon SP, KCR1
260 movi reg_save_area, SP
261 st.q SP, SAVED_R2, r2
262 st.q SP, SAVED_R3, r3
263 st.q SP, SAVED_R4, r4
264 st.q SP, SAVED_R5, r5
265 st.q SP, SAVED_R6, r6
266 st.q SP, SAVED_R18, r18
268 st.q SP, SAVED_TR0, r3
275 or SP, ZERO, r5
[all …]
|
| /arch/c6x/kernel/ |
| D | entry.S | 22 #define SP B15 macro
43 SHR .S1X SP,THREAD_SHIFT,reg
51 STW .D2T2 B0,*SP--[2] ; save original B0
57 STW .D2T2 B1,*+SP[1] ; save original B1
58 XOR .D2 SP,B1,B0 ; (SP ^ KSP)
59 LDW .D2T2 *+SP[1],B1 ; restore B0/B1
60 LDW .D2T2 *++SP[2],B0
62 [B0] STDW .D2T2 SP:DP,*--B1[1] ; user: save user sp/dp kstack
63 [B0] MV .S2 B1,SP ; and switch to kstack
64 ||[!B0] STDW .D2T2 SP:DP,*--SP[1] ; kernel: save on current stack
[all …]
|
| D | switch_to.S | 13 #define SP B15 macro
45 ;; Switch to next SP
46 MV .S2 B7,SP
|
| /arch/blackfin/lib/ |
| D | modsi3.S | 39 [--SP] = (R7:6); /* Push R7 and R6 */
40 [--SP] = RETS; /* and return address */
43 SP += -12; /* Should always provide this space */
45 SP += 12;
48 RETS = [SP++]; /* Get back return address */
49 (R7:6) = [SP++]; /* Pop registers R7 and R4 */
|
| D | umodsi3.S | 32 [--SP] = (R7:6); /* Push registers and */
33 [--SP] = RETS; /* Return address */
36 SP += -12; /* Should always provide this space */
38 SP += 12;
41 RETS = [SP++]; /* Pop return address */
42 ( R7:6) = [SP++]; /* And registers */
|
| D | muldi3.S | 51 A0 = R2.H * R1.L, A1 = R2.L * R1.H (FU) || R3 = [SP + 12]; /* E1 */
52 A0 += R3.H * R0.L, A1 += R3.L * R0.H (FU) || [SP] = R4; /* E1 */
71 R1.h = R1.h + R4.l (NS) || R4 = [SP];
|
| D | divsi3.S | 111 [--SP] = (R7:5); /* Push registers R5-R7 */
113 [--SP] = R2;
125 R0 = R0 << 1 || R5 = [SP];
143 SP += 4;
144 (R7:5)= [SP++]; /* Pop registers R6-R7 */
|
| D | udivsi3.S | 116 [--SP] = (R7:5); /* Push registers R5-R7 */
135 [--SP] = R3;
152 R3 = R3 << 1 || R5 = [SP];
178 SP += 4;
179 (R7:5) = [SP++]; /* Pop registers R5-R7 */
|
| /arch/powerpc/platforms/cell/spufs/ |
| D | spu_save_crt0.S | 77 il $SP, 16368
78 stqd $0, 0($SP)
84 stqd $SP, -160($SP)
85 ai $SP, $SP, -160
|
| D | spu_restore_crt0.S | 43 il $SP, 16368
44 stqd $0, 0($SP)
50 stqd $SP, -160($SP)
51 ai $SP, $SP, -160
|
| /arch/blackfin/mach-bf609/ |
| D | dpm.S | 14 SP = P0; define
86 EX_SCRATCH_REG = SP;
87 SP = P0; define
120 SP = EX_SCRATCH_REG; define
122 (R7:0,P5:0) = [SP++];
140 [P0++] = SP;
152 SP += 4;
|
| /arch/arm/kernel/ |
| D | unwind.c | 87 SP = 13, enumerator
260 unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; in unwind_exec_pop_subset_r4_to_r13()
272 ctrl->vrs[SP] = (unsigned long)vsp; in unwind_exec_pop_subset_r4_to_r13()
280 unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; in unwind_exec_pop_r4_to_rN()
292 ctrl->vrs[SP] = (unsigned long)vsp; in unwind_exec_pop_r4_to_rN()
300 unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; in unwind_exec_pop_subset_r0_to_r3()
311 ctrl->vrs[SP] = (unsigned long)vsp; in unwind_exec_pop_subset_r0_to_r3()
327 ctrl->vrs[SP] += ((insn & 0x3f) << 2) + 4; in unwind_exec_insn()
329 ctrl->vrs[SP] -= ((insn & 0x3f) << 2) + 4; in unwind_exec_insn()
346 ctrl->vrs[SP] = ctrl->vrs[insn & 0x0f]; in unwind_exec_insn()
[all …]
|
| D | probes-thumb.c | 108 REGS(SP, 0, SP, 0, NOSPPC)),
117 REGS(SP, 0, NOPC, 0, NOSPPC)),
170 REGS(SP, 0, NOPC, 0, 0)),
201 REGS(SP, 0, SP, 0, 0)),
|
| /arch/mn10300/mm/ |
| D | misalignment.c | 120 SP, /* stack pointer */ enumerator
189 { "mov", 0x4200, 0xf300, 0, FMT_S1, 0, {DM1, MEM2(IMM8, SP)}},
190 { "mov", 0x4300, 0xf300, 0, FMT_S1, 0, {AM1, MEM2(IMM8, SP)}},
191 { "mov", 0x5800, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), DN0}},
192 { "mov", 0x5c00, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), AN0}},
213 { "mov", 0xfa900000, 0xfff30000, 0, FMT_D2, 0, {AM1, MEM2(IMM16, SP)}},
214 { "mov", 0xfa910000, 0xfff30000, 0, FMT_D2, 0, {DM1, MEM2(IMM16, SP)}},
215 { "mov", 0xfab00000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), AN0}},
216 { "mov", 0xfab40000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), DN0}},
221 { "mov", 0xfb8a0000, 0xffff0f00, 0, FMT_D7, AM33, {MEM2(IMM8, SP), RN2}},
[all …]
|
| /arch/blackfin/include/asm/ |
| D | entry.h | 132 (R7:0, P5:0) = [SP++]; \
133 SP += 0x8; \
134 SYSCFG = [SP++]; \
161 (R7:0, P5:0) = [SP++]; \
162 SP += 0x8; \
163 SYSCFG = [SP++]; \
|
| /arch/blackfin/mach-common/ |
| D | dpmc_modes.S | 14 [--SP] = (R7:4, P5:3);
15 [--SP] = RETS;
50 RETS = [SP++];
51 (R7:4, P5:3) = [SP++];
90 [--SP] = (R7:4, P5:3);
91 [--SP] = RETS;
185 RETS = [SP++];
186 (R7:4, P5:3) = [SP++];
305 [P0++] = SP; /* Save Stack Pointer */
317 SP += 4;
|
| D | interrupt.S | 112 SP += -12;
115 SP += 12;
137 SP += 12;
194 SP += -12;
196 SP += 12;
230 SP += -12;
232 SP += 12;
|
| D | entry.S | 95 R1 = SP;
118 ASTAT = [SP++];
119 SP = EX_SCRATCH_REG; define
387 SP = EX_SCRATCH_REG; define
400 SP += -12;
402 SP += 12;
442 SP += -12;
444 SP += 12;
555 SP += -12;
557 SP += 12;
[all …]
|
| /arch/blackfin/kernel/ |
| D | entry.S | 46 SP += -12;
48 SP += 12;
|
| /arch/x86/crypto/ |
| D | serpent-sse2-x86_64-asm_64.S | 580 #define SP(SBOX, x0, x1, x2, x3, x4, i) \ macro
716 SP(SI7, RA, RB, RC, RD, RE, 31); KL2(RB, RD, RA, RE, RC, 31);
717 SP(SI6, RB, RD, RA, RE, RC, 30); KL2(RA, RC, RE, RB, RD, 30);
718 SP(SI5, RA, RC, RE, RB, RD, 29); KL2(RC, RD, RA, RE, RB, 29);
719 SP(SI4, RC, RD, RA, RE, RB, 28); KL2(RC, RA, RB, RE, RD, 28);
720 SP(SI3, RC, RA, RB, RE, RD, 27); KL2(RB, RC, RD, RE, RA, 27);
721 SP(SI2, RB, RC, RD, RE, RA, 26); KL2(RC, RA, RE, RD, RB, 26);
722 SP(SI1, RC, RA, RE, RD, RB, 25); KL2(RB, RA, RE, RD, RC, 25);
723 SP(SI0, RB, RA, RE, RD, RC, 24); KL2(RE, RC, RA, RB, RD, 24);
724 SP(SI7, RE, RC, RA, RB, RD, 23); KL2(RC, RB, RE, RD, RA, 23);
[all …]
|
| D | serpent-avx2-asm_64.S | 535 #define SP(SBOX, x0, x1, x2, x3, x4, i) \ macro
631 SP(SI7, RA, RB, RC, RD, RE, 31); KL2(RB, RD, RA, RE, RC, 31);
632 SP(SI6, RB, RD, RA, RE, RC, 30); KL2(RA, RC, RE, RB, RD, 30);
633 SP(SI5, RA, RC, RE, RB, RD, 29); KL2(RC, RD, RA, RE, RB, 29);
634 SP(SI4, RC, RD, RA, RE, RB, 28); KL2(RC, RA, RB, RE, RD, 28);
635 SP(SI3, RC, RA, RB, RE, RD, 27); KL2(RB, RC, RD, RE, RA, 27);
636 SP(SI2, RB, RC, RD, RE, RA, 26); KL2(RC, RA, RE, RD, RB, 26);
637 SP(SI1, RC, RA, RE, RD, RB, 25); KL2(RB, RA, RE, RD, RC, 25);
638 SP(SI0, RB, RA, RE, RD, RC, 24); KL2(RE, RC, RA, RB, RD, 24);
639 SP(SI7, RE, RC, RA, RB, RD, 23); KL2(RC, RB, RE, RD, RA, 23);
[all …]
|
| D | serpent-avx-x86_64-asm_64.S | 543 #define SP(SBOX, x0, x1, x2, x3, x4, i) \ macro
639 SP(SI7, RA, RB, RC, RD, RE, 31); KL2(RB, RD, RA, RE, RC, 31);
640 SP(SI6, RB, RD, RA, RE, RC, 30); KL2(RA, RC, RE, RB, RD, 30);
641 SP(SI5, RA, RC, RE, RB, RD, 29); KL2(RC, RD, RA, RE, RB, 29);
642 SP(SI4, RC, RD, RA, RE, RB, 28); KL2(RC, RA, RB, RE, RD, 28);
643 SP(SI3, RC, RA, RB, RE, RD, 27); KL2(RB, RC, RD, RE, RA, 27);
644 SP(SI2, RB, RC, RD, RE, RA, 26); KL2(RC, RA, RE, RD, RB, 26);
645 SP(SI1, RC, RA, RE, RD, RB, 25); KL2(RB, RA, RE, RD, RC, 25);
646 SP(SI0, RB, RA, RE, RD, RC, 24); KL2(RE, RC, RA, RB, RD, 24);
647 SP(SI7, RE, RC, RA, RB, RD, 23); KL2(RC, RB, RE, RD, RA, 23);
[all …]
|
| /arch/mn10300/lib/ |
| D | __ucmpdi2.S | 19 # unsigned long long b [(SP,12),(SP,16)])
|
| /arch/x86/kernel/ |
| D | vm86_32.c | 79 #define SP(regs) (*(unsigned short *)&((regs)->pt.sp)) macro
537 SP(regs) -= 6; in do_int()
559 do_int(regs, trapno, (unsigned char __user *) (regs->pt.ss << 4), SP(regs)); in handle_vm86_trap()
592 sp = SP(regs); in handle_vm86_fault()
619 SP(regs) -= 4; in handle_vm86_fault()
622 SP(regs) -= 2; in handle_vm86_fault()
633 SP(regs) += 4; in handle_vm86_fault()
636 SP(regs) += 2; in handle_vm86_fault()
670 SP(regs) += 12; in handle_vm86_fault()
675 SP(regs) += 6; in handle_vm86_fault()
|
| /arch/sh/kernel/ |
| D | head_64.S | 287 movi init_thread_union, SP
288 putcon SP, KCR0 /* Set current to init_task */
290 add SP, r22, SP
|