Searched refs:STBCR7 (Results 1 – 2 of 2) sorted by relevance
| /arch/sh/kernel/cpu/sh2a/ |
| D | clock-sh7264.c | 24 #define STBCR7 0xfffe0418 macro
96 [MSTP77] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 7, 0), /* SCIF */
97 [MSTP74] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 4, 0), /* VDC */
98 [MSTP72] = SH_CLK_MSTP8(&div4_clks[DIV4_P], STBCR7, 2, 0), /* CMT */
|
| D | clock-sh7269.c | 24 #define STBCR7 0xfffe0418 macro
126 [MSTP72] = SH_CLK_MSTP8(&peripheral0_clk, STBCR7, 2, 0), /* CMT */
|