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Searched refs:T2_SPARSE_MEM (Results 1 – 2 of 2) sorted by relevance

/arch/alpha/include/asm/
Dcore_t2.h43 #define T2_SPARSE_MEM (IDENT_ADDR + GAMMA_BIAS + 0x200000000UL) macro
459 result = *(vip) ((addr << 5) + T2_SPARSE_MEM + 0x00); in t2_readb()
470 result = *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x08); in t2_readw()
485 result = *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x18); in t2_readl()
496 work = (addr << 5) + T2_SPARSE_MEM + 0x18; in t2_readq()
510 *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x00) = w; in t2_writeb()
521 *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x08) = w; in t2_writew()
534 *(vuip) ((addr << 5) + T2_SPARSE_MEM + 0x18) = b; in t2_writel()
544 work = (addr << 5) + T2_SPARSE_MEM + 0x18; in t2_writeq()
/arch/alpha/kernel/
Dcore_t2.c445 hose->sparse_mem_base = T2_SPARSE_MEM - IDENT_ADDR; in t2_init_arch()