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Searched refs:TS_INDEX2VAL (Results 1 – 7 of 7) sorted by relevance

/arch/arm/mach-shmobile/
Ddma-register.h51 #define TS_INDEX2VAL(i) \ macro
55 #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL((xmit_sz)))
56 #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL((xmit_sz)))
/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7757.c127 TS_INDEX2VAL(XMIT_SZ_16BIT),
134 TS_INDEX2VAL(XMIT_SZ_16BIT),
141 TS_INDEX2VAL(XMIT_SZ_32BIT),
148 TS_INDEX2VAL(XMIT_SZ_32BIT),
158 TS_INDEX2VAL(XMIT_SZ_8BIT),
165 TS_INDEX2VAL(XMIT_SZ_8BIT),
172 TS_INDEX2VAL(XMIT_SZ_8BIT),
179 TS_INDEX2VAL(XMIT_SZ_8BIT),
186 TS_INDEX2VAL(XMIT_SZ_8BIT),
193 TS_INDEX2VAL(XMIT_SZ_8BIT),
[all …]
Dsetup-sh7724.c39 .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
44 .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
49 .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
54 .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
59 .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
64 .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
69 .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
74 .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
79 .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
84 .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
[all …]
Dsetup-sh7722.c33 .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
38 .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
43 .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
48 .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
53 .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
58 .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_8BIT),
63 .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),
68 .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),
73 .chcr = DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),
78 .chcr = DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL(XMIT_SZ_32BIT),
[all …]
/arch/sh/include/cpu-sh4/cpu/
Ddma-register.h67 #define TS_INDEX2VAL(i) ((((i) & 3) << CHCR_TS_LOW_SHIFT) | \ macro
97 #define TS_INDEX2VAL(i) (((i) & 7) << CHCR_TS_LOW_SHIFT) macro
/arch/sh/include/cpu-sh3/cpu/
Ddma-register.h39 #define TS_INDEX2VAL(i) (((i) & 3) << CHCR_TS_LOW_SHIFT) macro
/arch/sh/drivers/dma/
Ddma-sh.c28 #define RS_DUAL (DM_INC | SM_INC | RS_AUTO | TS_INDEX2VAL(XMIT_SZ_32BIT))