Searched refs:UART_LCR (Results 1 – 13 of 13) sorted by relevance
| /arch/powerpc/kernel/ |
| D | udbg_16550.c | 24 #define UART_LCR 3 macro
33 #define UART_DLAB UART_LCR
114 udbg_uart_out(UART_LCR, 0x00); in udbg_uart_setup()
117 udbg_uart_out(UART_LCR, LCR_DLAB); in udbg_uart_setup()
121 udbg_uart_out(UART_LCR, 0x3); in udbg_uart_setup()
133 old_lcr = udbg_uart_in(UART_LCR); in udbg_probe_uart_speed()
136 udbg_uart_out(UART_LCR, old_lcr | LCR_DLAB); in udbg_probe_uart_speed()
150 udbg_uart_out(UART_LCR, old_lcr); in udbg_probe_uart_speed()
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| /arch/powerpc/platforms/embedded6xx/ |
| D | ls_uart.c | 66 out_8(avr_addr + UART_LCR, cval); /* initialise UART */ in avr_uart_configure()
72 out_8(avr_addr + UART_LCR, cval); /* Set character format */ in avr_uart_configure()
74 out_8(avr_addr + UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ in avr_uart_configure()
77 out_8(avr_addr + UART_LCR, cval); /* reset DLAB */ in avr_uart_configure()
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| /arch/powerpc/boot/ |
| D | virtex.c | 21 #define UART_LCR 3 /* Out: Line Control Register */ macro
58 out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB); in virtex_ns16550_console_init()
65 out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8); in virtex_ns16550_console_init()
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| D | ns16550.c | 21 #define UART_LCR 3 /* Out: Line Control Register */ macro
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| /arch/frv/kernel/ |
| D | gdb-io.h | 24 #undef UART_LCR
37 #define UART_LCR 3*8 /* Out: Line Control Register */ macro
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| /arch/x86/platform/intel-mid/ |
| D | early_printk_intel_mid.c | 268 lcr = readb(phsu + UART_LCR); in hsu_early_console_init()
269 writeb((0x80 | lcr), phsu + UART_LCR); in hsu_early_console_init()
271 writeb(lcr, phsu + UART_LCR); in hsu_early_console_init()
276 writeb(0x3, phsu + UART_LCR); in hsu_early_console_init()
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| /arch/mips/pmcs-msp71xx/ |
| D | msp_serial.c | 50 if (offset == UART_LCR) in msp_serial_out()
83 writeb(d->last_lcr, p->membase + (UART_LCR << p->regshift)); in msp_serial_handle_irq()
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| /arch/mn10300/unit-asb2303/include/unit/ |
| D | serial.h | 72 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
87 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LCR * 4, u8)
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| /arch/sh/include/asm/ |
| D | smc37c93x.h | 61 #define UART_LCR 0x6 /* Line Control Register */ macro
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| /arch/mn10300/unit-asb2364/include/unit/ |
| D | serial.h | 69 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 2, u8)
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| /arch/mn10300/unit-asb2305/include/unit/ |
| D | serial.h | 63 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
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| /arch/blackfin/mach-bf533/include/mach/ |
| D | cdefBF532.h | 496 #define bfin_read_UART_LCR() bfin_read16(UART_LCR)
497 #define bfin_write_UART_LCR(val) bfin_write16(UART_LCR,val)
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| /arch/blackfin/mach-bf561/include/mach/ |
| D | cdefBF561.h | 125 #define bfin_read_UART_LCR() bfin_read16(UART_LCR)
126 #define bfin_write_UART_LCR(val) bfin_write16(UART_LCR,val)
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