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Searched refs:__REG2 (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mach-pxa/include/mach/
Dpxa27x-udc.h102 #define UDCCSN(x) __REG2(0x40600100, (x) << 2)
149 #define UDCBCN(x) __REG2(0x40600200, (x)<<2)
175 #define UDCDN(x) __REG2(0x40600300, (x)<<2)
203 #define UDCCN(x) __REG2(0x40600400, (x)<<2)
Dhardware.h47 # define __REG2(x,y) \ macro
Dpxa2xx-regs.h43 #define PCMD(x) __REG2(0x40F00080, (x)<<2)
/arch/arm/mach-pxa/
Dmfp-pxa2xx.c28 #define PGSR(x) __REG2(0x40F00020, (x) << 2)
29 #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
34 #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
35 #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
36 #define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
37 #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
/arch/xtensa/include/asm/
Dcoprocessor.h120 #define __REG2(cc,abi,type,...) __REG2_ ## type (__VA_ARGS__) macro